Performance estimation-based resource allocation for reconfigurable architectures

A computer-implemented method of allocating available physical compute units and/or physical memory units of a reconfigurable data processor to operation units of an operation unit graph for execution thereof, the method including:

• initializing lower and upper search bounds of generic stage compute processing time required for executing an operation unit of the operation unit graph;
• selecting, for evaluation, an intermediate stage compute processing time between the lower and upper search bounds of the generic stage compute processing time;
• determining a pipeline number of the physical compute units and/or the physical memory units required to process a pipeline compute load of the operation unit graph on the reconfigurable data processor;
• iteratively,
• initializing new lower and upper search bounds of the generic stage compute processing time and
• selecting, for evaluation in a next iteration, a new intermediate stage compute processing time between the new lower and upper search bounds of the generic stage compute processing time,
• taking into account whether the pipeline number of the physical compute units and/or the physical memory units produced for a prior intermediate stage compute processing time in a previous iteration is lower or higher than the available physical compute units and/or physical memory units;
• and
• terminating the iterative initializing and selecting
• when the pipeline number of the physical compute units and/or the physical memory units produced for a current intermediate stage compute processing time in a current iteration meets a convergence criteria.

A non-transitory computer readable storage medium impressed with computer program instructions to allocate available physical compute units and/or physical memory units of a reconfigurable data processor to operation units of an operation unit graph for execution thereof, the instructions, when executed on a processor, implement a method comprising:

• initializing lower and upper search bounds of generic stage compute processing time required for executing an operation unit of the operation unit graph;
• selecting, for evaluation, an intermediate stage compute processing time between the lower and upper search bounds of the generic stage compute processing time;
• determining a pipeline number of the physical compute units and/or the physical memory units required to process a pipeline compute load of the operation unit graph on the reconfigurable data processor, including
• for each of the operation units of the operation unit graph,
• determining a specific stage compute processing time required to process a stage compute load of a respective one of the operation units using only one physical compute unit and/or only one physical memory unit, and
• determining a stage number of the physical compute units and/or the physical memory units required to process the stage compute load of the respective one of the operation units by dividing the specific stage compute processing time with the intermediate stage compute processing time;
• and
• summing the stage number of the physical compute units and/or the physical memory units for each of the operation units and producing the pipeline number of the physical compute units and/or the physical memory units;
• iteratively,
• initializing new lower and upper search bounds of the generic stage compute processing time and
• selecting, for evaluation in a next iteration, a new intermediate stage compute processing time between the new lower and upper search bounds of the generic stage compute processing time,
• taking into account whether the pipeline number of the physical compute units and/or the physical memory units produced for a prior intermediate stage compute processing time in a previous iteration is lower or higher than the available physical compute units and/or physical memory units;
• terminating the iterative initializing and selecting
• when the pipeline number of the physical compute units and/or the physical memory units produced for a current intermediate stage compute processing time in a current iteration meets a convergence criteria;
• allocating the available physical compute units and/or physical memory units to the operation units of the operation unit graph based on the current intermediate stage compute processing time;
• and
• executing the operation units of the operation unit graph on the reconfigurable data processor based on the allocation.

A system including one or more processors coupled to memory, the memory loaded with computer instructions to allocate available physical compute units and/or physical memory units of a reconfigurable data processor to operation units of an operation unit graph for execution thereof, the instructions, when executed on the processors, implement actions comprising:

• initializing lower and upper search bounds of generic stage compute processing time required for executing an operation unit of the operation unit graph;
• selecting, for evaluation, an intermediate stage compute processing time between the lower and upper search bounds of the generic stage compute processing time;
• determining a pipeline number of the physical compute units and/or the physical memory units required to process a pipeline compute load of the operation unit graph on the reconfigurable data processor, including
• for each of the operation units of the operation unit graph,
• determining a specific stage compute processing time required to process a stage compute load of a respective one of the operation units using only one physical compute unit and/or only one physical memory unit, and
• determining a stage number of the physical compute units and/or the physical memory units required to process the stage compute load of the respective one of the operation units by dividing the specific stage compute processing time with the intermediate stage compute processing time;
• and
• summing the stage number of the physical compute units and/or the physical memory units for each of the operation units and producing the pipeline number of the physical compute units and/or the physical memory units;
• iteratively,
• initializing new lower and upper search bounds of the generic stage compute processing time and
• selecting, for evaluation in a next iteration, a new intermediate stage compute processing time between the new lower and upper search bounds of the generic stage compute processing time,
• taking into account whether the pipeline number of the physical compute units and/or the physical memory units produced for a prior intermediate stage compute processing time in a previous iteration is lower or higher than the available physical compute units and/or physical memory units;
• terminating the iterative initializing and selecting
• when the pipeline number of the physical compute units and/or the physical memory units produced for a current intermediate stage compute processing time in a current iteration meets a convergence criteria;
• allocating the available physical compute units and/or physical memory units to the operation units of the operation unit graph based on the current intermediate stage compute processing time;
• and
• executing the operation units of the operation unit graph on the reconfigurable data processor based on the allocation.

A non-transitory computer readable storage medium impressed with computer program instructions to allocate available physical compute units and/or physical memory units of a reconfigurable data processor to operation units of an operation unit graph for execution thereof, the instructions, when executed on a processor, implement a method comprising:

• initializing lower and upper search bounds of generic stage compute processing time required for executing an operation unit of the operation unit graph;
• selecting, for evaluation, an intermediate stage compute processing time between the lower and upper search bounds of the generic stage compute processing time;
• determining a pipeline number of the physical compute units and/or the physical memory units required to process a pipeline compute load of the operation unit graph on the reconfigurable data processor;
• iteratively,
• initializing new lower and upper search bounds of the generic stage compute processing time and
• selecting, for evaluation in a next iteration, a new intermediate stage compute processing time between the new lower and upper search bounds of the generic stage compute processing time,
• taking into account whether the pipeline number of the physical compute units and/or the physical memory units produced for a prior intermediate stage compute processing time in a previous iteration is lower or higher than the available physical compute units and/or physical memory units;
• and
• terminating the iterative initializing and selecting
• when the pipeline number of the physical compute units and/or the physical memory units produced for a current intermediate stage compute processing time in a current iteration meets a convergence criteria.

A system including one or more processors coupled to memory, the memory loaded with computer instructions to allocate available physical compute units and/or physical memory units of a reconfigurable data processor to operation units of an operation unit graph for execution thereof, the instructions, when executed on the processors, implement actions comprising:

• initializing lower and upper search bounds of generic stage compute processing time required for executing an operation unit of the operation unit graph;
• selecting, for evaluation, an intermediate stage compute processing time between the lower and upper search bounds of the generic stage compute processing time;
• determining a pipeline number of the physical compute units and/or the physical memory units required to process a pipeline compute load of the operation unit graph on the reconfigurable data processor;
• iteratively,
• initializing new lower and upper search bounds of the generic stage compute processing time and
• selecting, for evaluation in a next iteration, a new intermediate stage compute processing time between the new lower and upper search bounds of the generic stage compute processing time,
• taking into account whether the pipeline number of the physical compute units and/or the physical memory units produced for a prior intermediate stage compute processing time in a previous iteration is lower or higher than the available physical compute units and/or physical memory units;
• and
• terminating the iterative initializing and selecting
• when the pipeline number of the physical compute units and/or the physical memory units produced for a current intermediate stage compute processing time in a current iteration meets a convergence criteria.