Memory cells based on thin-film transistors

A computing device, comprising:

• a circuit board;
• and
• a memory device coupled to the circuit board and including a memory array, wherein the memory array includes a plurality of memory cells, a memory cell of the plurality of memory cells includes a transistor and a capacitor,
• wherein the capacitor includes:
• a first plate above a substrate, and coupled to a bit line of the memory array;
• and
• a second plate above the first plate and separated from the first plate by a capacitor dielectric layer, wherein the second plate is also a drain electrode of the transistor;
• and wherein the transistor includes:
• a channel layer including a channel material, the channel layer in contact with the drain electrode of the transistor;
• a gate electrode separated from the channel layer by a gate dielectric layer, the gate electrode coupled to a word line of the memory array;
• and
• a source electrode separated from the gate electrode by the gate dielectric layer, in contact with the channel layer, and coupled to a source line of the memory array.