Control circuit for successive approximation register analog-to-digital converter

A control circuit for a successive approximation register analog-to-digital converter (SAR ADC), the SAR ADC comprising a comparator and a switched-capacitor digital-to-analog converter (DAC) which comprises a target capacitor, a first terminal of the target capacitor being coupled to an input terminal of the comparator, a second terminal of the target capacitor being coupled to a first reference voltage through a first switch and coupled to a second reference voltage through a second switch, the control circuit comprising:

• a third switch coupled between the first reference voltage and the second terminal of the target capacitor;
• and
• a first buffer circuit coupled to the first switch and the third switch and configured to control the first switch and the third switch based on a control signal;
• wherein when the first switch and the third switch are turned on, the second switch is turned off, and when the second switch is turned on, the first switch and the third switch are turned off.