Differential digital-to-time converter for even-order INL cancellation and supply noise/disturbance rejection

A method of quantization noise cancellation in a phase-locked loop (PLL), wherein the PLL includes a phase detector having a first input configured to receive a reference signal and a second input configured to receive a feedback signal, the method comprising:

• delaying the reference signal by a first time delay;
• delaying the feedback signal by a second time delay;
• receiving a delta-sigma modulator (DSM) error signal;
• and
• adjusting the first time delay and the second time delay in opposite directions based on the DSM error signal.

An apparatus, comprising:

• means for detecting a phase error between a reference signal and a feedback signal;
• means for delaying the reference signal by a first time delay;
• means for delaying the feedback signal by a second time delay;
• and
• means for adjusting the first time delay and the second time delay in opposite directions based on a delta-sigma modulator (DSM) error signal.