Filter and method with multiplication operation approximation capability

A filter, the filter comprising:

• at least one first multiplication approximation circuit, for approximating at least one first multiplication operation corresponding to at least one first coefficient with at least one first bit-wise shift operation;
• and
• at least one second multiplication approximation circuit, for approximating at least one second multiplication operation corresponding to at least one second coefficient with a plurality of second bit-wise shift operations and at least one addition operation,
• wherein values of a first shift bit number, a second shift bit number and a third shift bit number of at least one shift bit number of the at least one first bit-wise shift operation and values of corner frequencies and quality factors are selected from values of one row of a table below with variation less than 1% for the corner frequencies and the quality factors:
• Corner
• frequency at
• 3072 ksps
• Corner
• First/third
• Second
• (kilo-samples
• frequency at
• Quality
• shift bit
• shift bit
• per second)
• 48 ksps
• factor
• number,
• number
• 293,596.34
• 4,587.44
• 0.7071
• 4
• 3
• 196,647.43
• 3,072.62
• 0.7071
• 5
• 4
• 133,818.77
• 2,090.92
• 0.7071
• 6
• 5
• 92,111.63
• 1,439.24
• 0.7071
• 7
• 6
• 63,915.58
• 998.681
• 0.7071
• 8
• 7
• 44,600.77
• 696.887
• 0.7071
• 9
• 8
• 31,245.41
• 488.210
• 0.7071
• 10
• 9
• 21,949.60
• 342.963
• 0.7071
• 11
• 10
• 32,991.13
• 2,061.95
• 0.8409
• 6
• 5
• 22,800.87
• 1,425.05
• 0.8409
• 7
• 6
• wherein variations of the values of the corner frequency and the quality factor of the table are less than 1%, and
• wherein the at least one first bit-wise shift operation and the plurality of second bit-wise shift operations are realized by wiring in an application-specific integrated circuit (ASIC).