Power amplifier circuit including multiple inverters connected in parallel
AssigneesDenso Corporation, National University Corporation Toyohashi University of Technology
InventorsTakanari Sasaya, Tetsuo Hirano, Takashi Ohira, Naoki Sakai, Takaaki Masaki
Life of this patent
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Abstract
In each E-class inverter, an internal voltage detection circuit detects an internal voltage of a resonant type power supply circuit or a matching circuit and adjusts a phase of a driving signal of a MOSFET based on a detected voltage. It is thus possible to match a phase of a current voltage of a sine waveform of each inverter and combine power highly efficiently. Since power combining is performed highly efficiently without using a variable capacitor and variable inductor, it is possible to suppress upsizing of elements and achieve downsizing of a power amplifier circuit.
Claims6
A power amplifier circuit for generating an AC output supplied to a load from a DC power, the power amplifier circuit comprising:
- multiple inverters, each inverter including a resonant type power supply circuit, which has a switching element and generates the AC output from the DC power, and a matching circuit provided at an output side of the resonant type power supply circuit,
- wherein:
- the multiple inverters are connected in parallel such that the resonant type power supply circuit of the each inverter is connected in parallel with each other through the matching circuit of the each inverter;
- the each inverter includes an internal voltage detection circuit for detecting an internal voltage of the resonant type power supply circuit or the matching circuit at a DC power supply side than an output of the matching circuit, and a phase adjusting circuit for adjusting a switching phase of the switching element based on a detection result of the internal voltage;
- and
- the phase adjusting circuit includes a triangular signal generating circuit for generating a triangular signal based on a signal from a signal source, a DC bias circuit for generating an input voltage which is phase-adjusted by an application of a DC bias to an output of the triangular signal generating circuit, and a D type flip-flop for generating a driving signal which is phase-adjusted in response to the input voltage as a clock.
A power amplifier circuit for generating an AC output supplied to a load from a DC power, the power amplifier circuit comprising:
- multiple inverters, each inverter including a resonant type power supply circuit, which has a switching element and generates the AC output from the DC power, and a matching circuit provided at an output side of the resonant type power supply circuit,
- wherein:
- the multiple inverters are connected in parallel such that the resonant type power supply circuit of the each inverter is connected in parallel with each other through the matching circuit of the each inverter;
- the each inverter includes an internal voltage detection circuit for detecting an internal voltage of the resonant type power supply circuit or the matching circuit at a DC power supply side than an output of the matching circuit, and a phase adjusting circuit for adjusting a switching phase of the switching element based on a detection result of the internal voltage;
- the matching circuit is formed of a T-type LCC circuit, which includes an inductor, a first capacitor and a second capacitor,
- the inductor and the second capacitor, which are included in the LCC resonant circuit, are connected in series between the DC power supply and the load, and the first capacitor included in the LCC resonant circuit is connected in parallel to the DC power supply between the inductor and the second capacitor;
- and
- a reactance value XL1 of the inductor, a reactance value XC2 of the first capacitor and a reactance value XC3 of the second capacitor satisfies the following equations [1], [2] and [3], in which r2 indicates an impedance determined by equally dividing the load by the number of the multiple inverters, r1 indicates an input impedance at time when the impedance r2 is connected relative to an output port of the matching circuit, k indicates an impedance conversion ratio of the matching circuit, and u indicates an imaginary part of a ratio between an in-phase admittance and an out-of-phase admittance forming an input admittance of the matching circuit,
- XL1=r1[√{k(1+u2)}+u] [1]
- XC2=r1√{k(1+u2)} [2] and
- XC3=r1[√{k(1+u2)}+ku] [3].
Dependencies are inferred from the claim text.