Semiconductor structure, transistor including the same, and method of manufacturing transistor

A transistor comprising:

• a drain electrode;
• at least one mask layer spaced apart from the drain electrode in a first direction;
• a first drift region of a first conductivity type between the drain electrode and the at least one mask layer;
• a channel region of a second conductivity type on the at least one mask layer;
• a second drift region on the first drift region, the second drift region contacting the channel region to form a PN-junction structure in a second direction different from the first direction;
• a source electrode on the channel region;
• and
• a gate electrode on the second drift region,
• wherein a thickness of the second drift region is greater than a thickness of the first drift region.

A transistor comprising:

• a drain electrode;
• at least one mask layer spaced apart from the drain electrode in a first direction;
• a first drift region of a first conductivity type between the drain electrode and the at least one mask layer;
• a channel region of a second conductivity type on the at least one mask layer;
• a second drift region on the first drift region, the second drift region contacting the channel region to form a PN-junction structure in a second direction different from the first direction;
• a source electrode on the channel region;
• a source region provided between the channel region and the source electrode, wherein
• the source region is doped with a dopant of a first conductivity type at a high concentration;
• and
• a gate electrode on the second drift region.

A method of manufacturing a transistor, the method comprising:

• forming a first drift region of a first conductivity type on a substrate;
• forming at least one mask layer on the first drift region;
• forming a second drift region by growing a semiconductor from a region of a surface of the first drift region not covered by the at least one mask layer;
• forming a channel region of a second conductivity type on the at least one mask layer, the channel region arranged such that a portion of the second drift region is between the channel region and the at least one mask layer in a first direction;
• forming a source electrode on the channel region;
• forming a gate electrode on the second drift region;
• and
• forming a drain electrode below the first drift region.