Trench gate depletion mode VDMOS device and method for manufacturing the same

A method for manufacturing a trench gate depletion mode VDMOS device comprising:

• providing a substrate which includes a first conductive type doped region and a drift region of a first conductive type on the first conductive type doped region;
• etching the drift region to form a trench;
• doping side walls of the trench to form a channel region in the trench;
• doping impurities of a second conductive type into an area of the first conductive type doped region around a bottom of the trench, and thereby forming a second conductive type doped region within the first conductive type doped region;
• the first conductive type being a conductive type opposite to the second conductive type;
• forming a gate insulating layer on an inner wall of the trench;
• filling a remaining space of the trench to form a gate electrode;
• doping impurities of the second conductive type on the surface of the drift region to form a well region at both sides of the trench;
• doping impurities of the first conductive type into the well region, and thereby forming a source region.