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US 11,387,348 B2Granted
Transistor formed with spacer
AssigneeNXP USA, Inc.
InventorsSaumitra Raj Mehrotra, Ljubo Radic, Bernhard Grote
Life of this patent
Estimating the term…
Abstract
Disclosed herein is a transistor structure that is formed by forming a sidewall spacer along a first vertical component sidewall of a trench wherein no sidewall spacer is formed along a second vertical component sidewall of the trench. During an etching of a dielectric layer in the trench, the sidewall spacer protects a first portion of the dielectric layer from being etched while a second portion of the dielectric layer along the second sidewall is etched. A portion of a control terminal can be formed in the space where the second portion is removed.
Claims20
A method for forming a transistor device comprising:
- forming a sidewall spacer of a spacer material along a first vertical component sidewall in a trench of a wafer over a layer of dielectric material in the trench, wherein the forming results in no sidewall spacer of the spacer material formed along a second vertical component sidewall of the trench, the second vertical component sidewall facing the first vertical component sidewall;
- removing a portion of the layer of dielectric material from a space in the trench that is directly over a bottom portion of the trench, wherein at least a portion of the space is not located directly beneath the sidewall spacer during the removing, wherein the sidewall spacer prevents a second portion of the layer of dielectric material located directly under the sidewall spacer from being removed during the removing;
- forming a control terminal structure from a control terminal material that is deposited over the wafer, the control terminal structure including a portion located in the space, the control terminal structure is for a transistor formed on the wafer;
- wherein the transistor includes a field plate that includes at least a portion of the sidewall spacer.
1 more element
A method for forming a transistor device comprising:
- forming a sidewall spacer of a spacer material along a first vertical component sidewall in a trench of a wafer over a layer of dielectric material in the trench, wherein the forming results in no sidewall spacer of the spacer material formed along a second vertical component sidewall of the trench, the second vertical component sidewall facing the first vertical component sidewall;
- removing a portion of the layer of dielectric material from a space in the trench that is directly over a bottom portion of the trench, wherein at least a portion of the space is not located directly beneath the sidewall spacer during the removing, wherein the sidewall spacer prevents a second portion of the layer of dielectric material located directly under the sidewall spacer from being removed during the removing;
- forming a control terminal structure from a control terminal material that is deposited over the wafer, the control terminal structure including a portion located in the space, the control terminal structure is for a transistor formed on the wafer;
- wherein the first vertical component sidewall has a greater height than the second vertical component sidewall during the forming the sidewall spacer.
1 more element
A method for forming a transistor device comprising:
- forming a sidewall spacer of a spacer material along a first vertical component sidewall in a trench of a wafer over a layer of dielectric material in the trench, wherein the forming results in no sidewall spacer of the spacer material formed along a second vertical component sidewall of the trench, the second vertical component sidewall facing the first vertical component sidewall;
- removing a portion of the layer of dielectric material from a space in the trench that is directly over a bottom portion of the trench, wherein at least a portion of the space is not located directly beneath the sidewall spacer during the removing, wherein the sidewall spacer prevents a second portion of the layer of dielectric material located directly under the sidewall spacer from being removed during the removing;
- forming a control terminal structure from a control terminal material that is deposited over the wafer, the control terminal structure including a portion located in the space, the control terminal structure is for a transistor formed on the wafer;
- wherein the space is located directly laterally between the second vertical component sidewall and a location directly beneath the sidewall spacer.
1 more element
A method for forming a transistor device comprising:
- forming a trench in a semiconductor material of a wafer, the trench including a first vertical component sidewall, a second vertical component sidewall, and a bottom portion;
- forming a layer of a first material over the semiconductor material including in the trench;
- patterning the layer of first material to form a third vertical component sidewall of the first material that extends into the trench, the third vertical component sidewall facing the first vertical component sidewall;
- forming a sidewall spacer of a spacer material along the third vertical component sidewall in the trench over a layer of dielectric material in the trench, wherein the forming results in no sidewall spacer of the spacer material being formed along the first vertical component sidewall;
- removing a first portion of the layer of dielectric material from a space in the trench that is directly over the bottom portion of the trench, wherein the sidewall spacer prevents a second portion of the layer of dielectric material located directly under the sidewall spacer from being removed during the removing, the space is located directly laterally between the first vertical component sidewall and the second portion;
- forming a control terminal structure of control terminal material that is deposited over the wafer, the control terminal structure including a portion located in the space, the control terminal structure is for a transistor.
3 more elements
A method for forming a transistor device comprising:
- in a trench in a wafer that includes a first vertical component sidewall, a second vertical component sidewall, and a bottom portion, wherein the second vertical component sidewall has a height greater than the first vertical component sidewall, forming a dielectric layer at least along the bottom portion and along the first vertical component sidewall;
- depositing a layer of spacer material over the wafer including in the trench;
- anisotropically etching the spacer material to leave a sidewall spacer of the spacer material along the second vertical component sidewall wherein no sidewall spacer of spacer material is located along the first vertical component sidewall;
- removing a first portion of the dielectric layer along the bottom portion of the trench in a first space of the trench, wherein a second portion of the dielectric layer located directly beneath the sidewall spacer remains after the removing, the first space is located directly laterally between the first vertical component sidewall and the second portion;
- forming a control terminal structure of a transistor, the control terminal structure including a portion located in the first space.
2 more elements
Dependencies are inferred from the claim text.