Memory device and method for fabricating the same

A memory device, comprising:

• a main cell on a substrate, wherein the main cell comprises:
• a first gate electrode on the substrate;
• a second gate electrode on one side of the first gate electrode and covering a top surface of the first gate electrode;
• a first charge trapping layer between the first gate electrode and the second gate electrode, wherein the first charge trapping layer comprises a first oxide-nitride-oxide (ONO) layer;
• a third gate electrode on another side of the first gate electrode and covering the top surface of the first gate electrode;
• and
• a second charge trapping layer between the first gate electrode and the third gate electrode, wherein the second charge trapping layer comprises a second ONO layer;
• a first reference cell adjacent to one side of the main cell;
• and
• a second reference cell adjacent to another side of the main cell
• a first contact plug directly contacting the first gate electrode;
• a second contact plug directly contacting the second gate electrode;
• and
• a third contact plug directly contacting the third gate electrode, wherein a bottom surface of the first contact plug is lower than a bottom surface of the second contact plug and a bottom surface of the third contact plug.