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US 11,387,333 B2Granted
LOCOS with sidewall spacer for transistors and other devices
AssigneeTexas Instruments Incorporated
InventorHenry Litzmann Edwards
Life of this patent
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Abstract
An integrated circuit (IC) includes a first field-plated field effect transistor (FET), and a second field-plated FET, and functional circuitry configured together with the field-plated FETs for realizing at least one circuit function in a semiconductor surface layer on a substrate. The field-plated FETs include a gate structure including a gate electrode partially over a LOCOS field relief oxide and partially over a gate dielectric layer. The LOCOS field relief oxide thickness for the first field-plated FET is thicker than the LOCOS field relief oxide thickness for the second field-plated FET. There are sources and drains on respective sides of the gate structures in the semiconductor surface layer.
Claims19
An integrated circuit (IC), comprising:
- a first field-plated field effect transistor (FET) having a first gate structure including a first gate electrode partially over a first field relief oxide and partially over a gate dielectric layer;
- and
- a second field-plated FET having a second gate structure including a second gate electrode partially over a second field relief oxide and partially over the gate dielectric layer, wherein:
- a first thickness of the first field relief oxide for the first field-plated FET is thicker than a second thickness of the second field relief oxide for the second field-plated FET;
- the first field relief oxide has first tapered edges, a center portion of the first thickness, and an intermediate portion between opposite edges of the first tapered edges and the center portion, the intermediate portion having a third thickness of the first field relief oxide that is less than the first thickness;
- and
- the second field relief oxide has second tapered edges and a top surface between the second tapered edges that is flat.
4 more elements
An integrated circuit (IC), comprising:
- a first field-plated field effect transistor (FET) comprising a first gate structure including a first gate electrode partially over a first field relief oxide and partially over a first gate dielectric layer;
- a second field-plated FET comprising a second gate structure including a second gate electrode partially over a second field relief oxide and partially over a second gate dielectric layer;
- and
- sources and drains on respective sides of the first and second gate structures in a semiconductor surface layer;
- wherein:
- a first thickness of the first field relief oxide for the first field-plated FET is thicker than a second thickness of the second field relief oxide for the second field-plated FET,
- the first field relief oxide has first and second tapered edges, a center portion of the first thickness, and an intermediate portion between each of the first and second tapered edges and the center portion, the intermediate portion having a third thickness of the first field relief oxide that is less than the first thickness and greater than the second thickness;
- and
- the semiconductor surface layer is recessed under the first field relief oxide for the first field-plated FET and under the second field relief oxide for the second field-plated FET.
6 more elements
An integrated circuit (IC), comprising:
- a first field-plated field effect transistor (FET) comprising a first gate structure including a first gate electrode partially over a first field relief oxide and partially over a first gate dielectric layer;
- a second field-plated FET comprising a second gate structure including a second gate electrode partially over a second field relief oxide and partially over a second gate dielectric layer;
- and
- sources and drains on respective sides of the first and second gate structures in a semiconductor surface layer;
- wherein:
- a first thickness of the first field relief oxide for the first field-plated FET is thicker than a second thickness of the second field relief oxide for the second field-plated FET,
- the first field relief oxide has first and second tapered edges, a center portion of the first thickness, and an intermediate portion between each of the first and second tapered edges and the center portion, the intermediate portion having a third thickness of the first field relief oxide that is less than the first thickness and greater than the second thickness, and
- the thickness of the first and second field relief oxides are both at least twice as thick as the first and second gate dielectric layers.
5 more elements
An integrated circuit (IC), comprising:
- a first field-plated field effect transistor (FET) having a first gate structure including a first gate electrode partially over a first field relief oxide and partially over a gate dielectric layer, wherein the first field relief oxide has first end portion, a second end portion, a center portion of a first thickness, and an intermediate portion of a second thickness less than the first thickness, the intermediate portion located between the center portion and both the first end portion and the second end portion;
- and
- a second field-plated FET having a second gate structure including a second gate electrode partially over a second field relief oxide and partially over the gate dielectric layer, wherein the first and second thicknesses of the first field relief oxide for the first field-plated FET are thicker than a thickness of the second field relief oxide for the second field-plated FET.
Dependencies are inferred from the claim text.