Connectivity in quantum dot devices
AssigneeIntel Corporation
InventorsAdam Holmes, Sonika Johri, Anne Y. Matsuura, Ravi Pillarisetty, Thomas Francis Watson, James S. Clarke
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Abstract
Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer; and a plurality of gates above the quantum well stack, wherein the gates are arranged in a ladder arrangement including two rails having at least N gates each and at least one active rung, and a number of active rungs in the ladder arrangement is less than N.
Claims19
A quantum dot device, comprising:
- a quantum well stack including a quantum well layer;
- a first dielectric material above the quantum well stack;
- and
- a plurality of gates above the quantum well stack,
- wherein:
- the gates are arranged in a ladder arrangement including two rails having at least N gates each, at least one active rung, and at least one passive rung,
- N is an integer greater than 1,
- a number of active rungs in the ladder arrangement is less than N,
- an individual gate of the plurality of gates extends completely through the first dielectric material to the quantum well stack and includes a gate metal,
- the at least one active rung is a rung that includes at least one gate of the plurality of gates,
- the at least one passive rung extends completely through the first dielectric material to the quantum well stack and includes a second dielectric material, and
- the first dielectric material has a different material composition than the second dielectric material.
A quantum computing device, comprising:
- a quantum processing device, wherein the quantum processing device includes a quantum well stack including a quantum well layer, a first dielectric material above the quantum well stack, and a plurality of gates above the quantum well stack, wherein:
- the gates are arranged in a ladder arrangement including two rails having at least N gates each, at least one active rung, and at least one passive rung,
- a number of active rungs in the ladder arrangement is less than N,
- N is an integer greater than 1,
- each of the plurality of gates includes a via opening extending through the first dielectric material to the quantum well stack and including a gate metal,
- the at least one active rung is a rung that includes at least one gate of the plurality of gates,
- the at least one passive rung is a further via opening extending entirely through the first dielectric material to the quantum well stack and including a second dielectric material, and
- the first dielectric material has a different material composition than the second dielectric material;
- a non-quantum processing device, coupled to the quantum processing device, to control voltages applied to the gates;
- and
- a memory device to store data generated by the quantum processing device during operation of the quantum processing device.
A method of fabricating a quantum dot device, the method comprising:
- providing a quantum well stack including a quantum well layer;
- providing a first dielectric material above the quantum well stack;
- and
- providing a plurality of gates above the quantum well stack,
- wherein:
- the gates are arranged in a ladder arrangement including two rails having at least N gates each, at least one active rung, and at least one passive rung,
- N is an integer greater than 1,
- a number of active rungs in the ladder arrangement is less than N,
- an individual gate of the plurality of gates extends completely through the first dielectric material to the quantum well stack and includes a gate metal,
- the at least one active rung is a rung that includes at least one gate of the plurality of gates,
- the at least one passive rung extends completely through the first dielectric material to the quantum well stack and includes a second dielectric material, and
- the first dielectric material has a different material composition than the second dielectric material.
Dependencies are inferred from the claim text.