US 11,387,322 B2 · Semiconductor device having nanosheet transistor and methods of fabrication thereof

Abstract

Embodiments of the present disclosure provide semiconductor device structures having at least one T-shaped stacked nanosheet transistor to provide increased effective conductive area across the channel regions. In one embodiment, the semiconductor device structure includes a first channel layer formed of a first material, wherein the first channel layer has a first width, and a second channel layer formed of a second material different from the first material, wherein the second channel layer has a second width less than the first width, and the second channel layer is in contact with the first channel layer. The structure also includes a gate dielectric layer conformally disposed on the first channel layer and the second channel layer, and a gate electrode layer disposed on the gate dielectric layer.

Claims20

Dependent claims

A semiconductor device structure, comprising:

a first channel layer formed of a first material, wherein the first channel layer has a first width;
a second channel layer formed of a second material different from the first material, wherein the second channel layer has a second width less than the first width, and the second channel layer is in contact with the first channel layer, and wherein the second channel layer has a height that is greater than the second width;
a gate dielectric layer conformally disposed on the first channel layer and the second channel layer;
and
a gate electrode layer disposed on the gate dielectric layer.

2 more elements

Dependencies are inferred from the claim text.

Semiconductor device having nanosheet transistor and methods of fabrication thereof

Life of this patent

Semiconductor device having nanosheet transistor and methods of fabrication thereof

Life of this patent

Abstract

Claims20