S-contact for SOI
AssigneepSemi Corporation
InventorsBefruz Tasbas, Simon Edward Willard, Alain Duvallet, Sinan Goktepeli
Life of this patent
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Abstract
Systems, methods, and apparatus for an improved protection from charge injection into layers of a device using resistive structures are described. Such resistive structures, named s-contacts, can be made using simpler fabrication methods and less fabrication steps. In a case of metal-oxide-semiconductor (MOS) field effect transistors (FETs), s-contacts can be made with direct connection, or resistive connection, to all regions of the transistors, including the source region, the drain region and the gate.
Claims22
An integrated circuit comprising:
- a high resistivity semiconductor substrate, the high resistivity based on a nominal doping of the semiconductor substrate;
- a single layer trap rich layer overlying and in contact with the semiconductor substrate at a region of the semiconductor substrate having the nominal doping;
- an insulation layer overlying and in contact with the trap rich layer;
- an active layer overlying and in contact with the insulation layer, the active layer comprising active regions and isolation regions of the integrated circuit;
- a transistor formed in respective active regions of the active layer, the respective active regions of the transistor comprising a drain region, a source region and a gate region;
- and
- a first conductive structure resistively connecting one of:
- a) a drain contact or a source contact, or b) a gate contact, to the semiconductor substrate, the first conductive structure comprising:
- a first conductive line connecting the one of a) or b) to a first conductive contact, the first conductive contact extending through the active layer at an isolation region or an active region that is separate from the respective active regions, further extending through the insulation layer and penetrate the trap rich layer to make a resistive contact with said region of the semiconductor substrate that is arranged below the trap rich layer.
A method for providing a discharge path to a silicon-on-insulator (SOI) transistor device, the method comprising:
- (i) forming an active layer on a semiconductor substrate consisting of a single layer high resistivity semiconductor substrate, the active layer being isolated from the high resistivity substrate via an insulation layer overlying and contacting a single layer trap rich layer formed on and contacting the semiconductor substrate;
- (ii) forming active regions of the transistor device in the active layer, the active regions comprising a source region, a drain region and a gate region;
- (iii) forming a first conductive structure resistively connecting one of:
- a) a drain contact or a source contact, or b) a gate contact, of the transistor device to the semiconductor substrate and the one of a) or b), the first conducting structure being formed by:
- forming a first conductive line connecting the one of a) or b) to a first conductive contact;
- extending the first conductive contact through the active layer at an isolation region of the active layer or at an active region of the active layer that is separate from the active regions of the transistor device, and through the insulation layer to penetrate the trap rich layer thereby making a resistive contact with the semiconductor substrate that is arranged immediately below the single layer trap rich layer, and
- (iv) based on the forming of the first conductive structure, providing a first discharge path for symmetrical flow of charges to the transistor device.
An integrated circuit comprising:
- a high resistivity semiconductor substrate comprising silicon;
- a single layer trap rich layer overlying and in contact with the silicon of the semiconductor substrate;
- an insulation layer overlying and in contact with the trap rich layer;
- an active layer overlying and in contact with the insulation layer, the active layer comprising active regions and isolation regions of the integrated circuit;
- a transistor formed in respective active regions of the active layer, the respective active regions of the transistor comprising a drain region, a source region and a gate region;
- and
- a first conductive structure resistively connecting one of:
- a) a drain contact or a source contact, or b) a gate contact, to the semiconductor substrate, the first conductive structure comprising:
- a first conductive line connecting the one of a) or b) to a first conductive contact, the first conductive contact extending through the active layer at an isolation region or an active region that is separate from the respective active regions, further extending through the insulation layer and penetrate the trap rich layer to make a resistive contact with the silicon of the semiconductor substrate that is arranged immediately below the trap rich layer.
Dependencies are inferred from the claim text.