Semiconductor device structure and methods of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHuan-Chieh Su, Chun-Yuan Chen, Pei-Yu Wang, Cheng-Chi Chuang, Chih-Hao Wang
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Abstract
A semiconductor device structure, along with methods of forming such, are described. The structure includes a source region, a drain region, and a gate electrode layer disposed between the source region and the drain region. The gate electrode layer includes a first surface facing the source region, and the first surface includes an edge portion having a first height. The gate electrode layer further includes a second surface opposite the first surface and facing the drain region. The second surface includes an edge portion having a second height. The second height is different from the first height.
Claims20
A semiconductor device structure, comprising:
- a conductive feature;
- a first source/drain region disposed over the conductive feature;
- a dielectric layer comprising a first surface in contact with the conductive feature and a second surface connected to the first surface;
- a second source/drain region disposed over a first dielectric material;
- a gate electrode layer disposed between the first source/drain region and the second source/drain region, wherein the gate electrode layer comprises:
- a first surface facing the first source/drain region, wherein the first surface includes a first edge portion;
- a second surface facing the second source/drain region, wherein the second surface includes a second edge portion;
- a third surface connected to the first edge portion of the first surface, wherein the third surface is located above a plane defined by the first surface of the dielectric layer;
- and
- a fourth surface connected to the second edge portion of the second surface, wherein the fourth surface is located below the plane defined by the first surface of the dielectric layer;
- and
- a plurality of semiconductor layers disposed over the dielectric layer, wherein the gate electrode layer surrounds a portion of each of the plurality of semiconductor layers.
A semiconductor device structure, comprising:
- a first source/drain epitaxial layer disposed over a power rail;
- a second source/drain epitaxial layer disposed over the power rail;
- and
- a gate electrode layer disposed between the first and second source/drain epitaxial layers, wherein the gate electrode layer comprises a conductive material, and wherein the gate electrode layer further comprises:
- a first surface facing the first source/drain epitaxial layer, wherein the first surface includes an edge portion having a first height;
- and
- a second surface opposite the first surface and facing the second source/drain epitaxial layer, wherein the second surface includes an edge portion having a second height, wherein the second height is different from the first height.
A semiconductor device structure, comprising:
- a first conductive feature disposed in a first dielectric material;
- a first silicide layer disposed on the first conductive feature;
- a first source/drain region disposed on the first silicide layer;
- a second silicide layer disposed on the first source/drain region;
- a second conductive feature disposed on the second silicide layer;
- a second source/drain region disposed on the first dielectric material;
- a third silicide layer disposed on the second source/drain region;
- a third conductive feature disposed on the third silicide layer;
- a dielectric layer having a surface in contact with the first conductive feature;
- and
- a gate electrode layer disposed between the first source/drain region and the second source/drain region, wherein the gate electrode layer comprises a surface located above a plane defined by the surface of the dielectric layer.
Dependencies are inferred from the claim text.