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US 11,387,155 B2Granted
IC having a metal ring thereon for stress reduction
AssigneeTexas Instruments Incorporated
InventorsAmit Sureshkumar Nangia, Sreenivasan Kalyani Koduri, Siva Prakash Gurrum, Christopher Daniel Manack
Life of this patent
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Abstract
An integrated circuit (IC) includes a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer. A metal wall that is ring-shaped is positioned above the top metal layer that is not electrically coupled to the circuitry. The stress sensitive circuit portion is with at least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity.
Claims24
An integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion;
- a solid same metal wall that is ring-shaped having opposing end surfaces, one of the end surfaces attached to the substrate and the other end surface attached to a metal pad that covers the entire other end surface, wherein the stress sensitive circuit portion is positioned with at least a majority of its area within an inner area of the substrate that is framed by the solid metal wall to provide a cavity.
An integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion;
- a metal wall that is ring-shaped positioned above the top metal layer that is not electrically coupled to the circuitry;
- a solid same metal wall that is ring-shaped having opposing end surfaces, one of the end surfaces attached to the substrate and the other end surface attached to a metal pad that covers the entire other end surface;
- wherein the stress sensitive circuit portion is positioned with at least a majority of its area within an inner area of the substrate that is framed by the solid metal wall to provide a cavity;
- and
- wherein the stress sensitive circuit portion comprises an environmental sensor for sensing a physical parameter.
3 more elements
A packaged device, comprising:
- an integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion;
- and
- a solid metal wall having opposing end surfaces that is ring-shaped, wherein the stress sensitive circuit portion is positioned with at least a majority of its area within an inner area of the substrate that is framed by the solid metal wall to provide a cavity;
- a leadframe including leads or lead terminals, and a pad, wherein one of the opposing end surfaces is coupled to the substrate and another of the opposing end surfaces is coupled to the pad;
- and
- a mold compound providing encapsulation for the packaged device, wherein at least a portion of the mold compound is excluded from being inside the solid metal wall.
4 more elements
A packaged device, comprising:
- an integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer, wherein there are bonding features on the bond pads, wherein the stress sensitive circuit portion comprises an environmental sensor for sensing a physical parameter, and wherein the leadframe has opening through the leadframe configured so that the stress sensitive circuit portion is exposed to an environment;
- a metal wall that is ring-shaped positioned above the top metal layer that is not electrically coupled to the circuitry;
- wherein the stress sensitive circuit portion is positioned with at least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity;
- a leadframe including leads or lead terminals;
- wherein the bonding features are bonded to the leads or to the lead terminals;
- and
- a mold compound providing encapsulation for the packaged device, wherein at least a portion of the mold compound is excluded from being inside the metal wall.
5 more elements
A packaged device, comprising:
- an integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer, wherein there are bonding features on the bond pads;
- and
- a metal wall having opposing end surfaces that is ring-shaped positioned above the top metal layer;
- wherein the stress sensitive circuit portion is positioned with at least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity;
- a leadframe including leads or lead terminals, and a pad, wherein one of the opposing end surfaces is coupled to the substrate and another of the opposing end surfaces is coupled to the pad;
- and
- a mold compound providing encapsulation for the packaged device, wherein at least a portion of the mold compound is excluded from being inside the solid metal wall.
5 more elements
A packaged device, comprising:
- an integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer, wherein there are bonding features on the bond pads;
- and
- a metal wall having opposing end surfaces that is ring-shaped positioned above the top metal layer, that is not electrically coupled to the circuitry;
- wherein the stress sensitive circuit portion is positioned with at least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity;
- a leadframe including leads or lead terminals, wherein the bonding features are bonded to the leads or to the lead terminals wherein one of the opposing end surfaces of the metal wall is coupled to the substrate and another of the opposing end surfaces of the metal wall is coupled to the leadframe;
- and
- a mold compound providing encapsulation for the packaged device, wherein at least a portion of the mold compound is excluded from being inside the cavity, wherein the leadframe provides one of an opening through the leadframe for exposing the cavity to an environment, and a lid for sealing the cavity.
5 more elements
An integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer;
- and
- a continuous solid same metal wall having opposing end surfaces, one of the end surfaces attached to the substrate and the other end surface attached to a metal pad that covers the entire other end surface, wherein the stress sensitive circuit portion is positioned with at least a majority of its area within an inner area of the substrate that is framed by the solid metal wall.
A packaged device, comprising:
- an integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer, wherein there are bonding features on the bond pads;
- and
- a continuous solid metal wall positioned above the top metal layer that is not electrically coupled to the circuitry, wherein the stress sensitive circuit portion is positioned with at least a majority of its area within an inner area of the substrate that is framed by the continuous solid metal wall to provide a cavity;
- a leadframe including leads or lead terminals, wherein the bonding features are bonded to the leads or to the lead terminals and having an opening through the leadframe so that the stress sensitive circuit portion is exposed to an environment;
- and
- a mold compound providing encapsulation for the packaged device, wherein at least a portion of the mold compound is excluded from being inside the continuous solid metal wall.
4 more elements
An integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function including a stress sensitive circuit portion of the circuitry with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer, wherein there are bonding features on the bond pads;
- and
- a plurality of metal features on or above the top metal layer, including a solid same metal wall not electrically coupled to the circuitry and metal features on the bond pads or on bump pads, having opposing end surfaces, one of the end surfaces attached to the substrate and the other end surface attached to a metal pad that covers the entire other end surface, wherein the stress sensitive circuit portion is positioned with a least a majority of its area within an inner area of the substrate that is framed by the solid metal wall to provide a cavity.
An integrated circuit (IC), comprising:
- a substrate including circuitry configured for a function including a stress sensitive circuit portion of the circuitry;
- a solid metal wall, not electrically coupled to the circuitry, having opposing end surfaces, one of the end surfaces attached to the substrate, wherein the stress sensitive circuit portion is positioned with a least a majority of its area within an inner area of the substrate that is framed by the metal wall to provide a cavity;
- a metal pad attached to the other end surface and covering the entire other end surface;
- a mold compound covering the IC, wherein at least a portion of the mold compound is excluded from being inside the metal wall.
1 more element
Dependencies are inferred from the claim text.