Stacked nanowire transistors

A circuit comprising:

• a plurality of stacks of silicon-containing elongated semiconductor features disposed over a semiconductor substrate and spaced apart from each other;
• a first gate wrapped all around each of the silicon-containing elongated semiconductor features from the plurality of stacks of silicon-containing elongated semiconductor features;
• a plurality of stacks of germanium-containing elongated semiconductor features disposed over the semiconductor substrate and spaced apart from each other;
• and
• a second gate wrapped all around each of the germanium-containing elongated semiconductor features from the plurality of stacks of germanium-containing elongated semiconductor features,
• wherein a number of the silicon-containing elongated semiconductor features in each of the plurality of stacks of silicon-containing elongated semiconductor features is different than a number of the germanium-containing elongated semiconductor features in each of the plurality of stacks of germanium-containing elongated semiconductor features,
• wherein a topmost silicon-containing elongated semiconductor feature from each of the plurality of stacks of silicon-containing elongated semiconductor features has top surface and a topmost germanium-containing elongated semiconductor feature from each of the plurality of stacks of germanium-containing elongated semiconductor features has a top surface that is at the same level as the top surface of the topmost elongated semiconductor feature from each of the plurality of stacks of silicon-containing elongated semiconductor features,
• wherein a bottommost silicon-containing elongated semiconductor feature is positioned closer to the semiconductor substrate than a bottommost germanium-containing elongated semiconductor feature is positioned to the semiconductor substrate,
• wherein the silicon-containing elongated semiconductor features in each of the plurality of stacks of silicon-containing elongated semiconductor features each have a first cross-sectional shape and wherein the germanium-containing elongated semiconductor features in each of the plurality of stacks of germanium-containing elongated semiconductor features each have a second cross-sectional shape that is different from the first cross-sectional shape, and
• wherein the first gate and the second gate are in direct contact with each other, both electrically and mechanically, and are made of different metal materials relative to each other.

A device comprising:

• a first plurality of fin structures and a second plurality of fin structures disposed over a semiconductor substrate, wherein each of the first plurality of fin structures and each of the second plurality of fin structures have top surfaces facing away from the semiconductor substrate;
• a shallow trench isolation structure extending adjacent ones of the first plurality of fin structures to the second plurality of fin structures, the shallow trench isolation structure having a top surface, wherein the top surface of the shallow trench isolation structure is at the same level as the top surfaces of the first plurality of fin structures and the top surfaces of the second plurality of fin structures;
• a first plurality of stacks of nanowires disposed over the first plurality of fin structures and spaced apart from each other;
• a second plurality of stacks of nanowires disposed over the second plurality of fin structures and spaced apart from each other;
• a first gate structure wrapping around each of the nanowires of the first plurality of stacks;
• and
• a second gate structure wrapping around each of the nanowires of the second plurality of stacks,
• wherein a number of nanowires in each of the first plurality of stacks is greater than a number of the nanowires in each of the second plurality of stacks,
• wherein a bottommost nanowire from each of the first plurality of stacks is closer to the semiconductor substrate than a bottommost nanowire from each of the second plurality of stacks,
• wherein the nanowires of the first plurality of stacks are formed of a different material than the nanowires of the second plurality of stacks,
• wherein the nanowires of the first plurality of stacks each have a first cross-sectional shape and wherein the nanowires of the second plurality of stacks each have a second cross-sectional shape that is different from the first cross-sectional shape, and
• wherein the first gate structure and the second gate structure are in direct contact with each other, both electrically and mechanically, and are made of different metal materials relative to each other.