Semiconductor storage device and control method of semiconductor storage device
AssigneesKabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
InventorMotoki Tamura
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Abstract
A semiconductor storage device according to the present embodiment includes an antifuse element and a first element. The antifuse element is connected at one end to a first terminal to which a write voltage is applicable, and includes a gate oxide film. The first element is connected to the other end of the antifuse element. In a case where the write voltage that breaks the gate oxide film is supplied to the first terminal and the gate oxide film is not broken, the first element supplies a second potential that makes a potential difference between the one end and the other end less than a potential that breaks the gate oxide film, to the other end.
Claims17
A semiconductor storage device comprising:
- an antifuse element connected at one end to a first terminal to which a write voltage is applicable, and including a gate oxide film;
- a first element connected to the other end of the antifuse element, wherein the first element is a first transistor connected at one end to the other end of the antifuse element
- a second transistor connected at one end to the other end of the first transistor;
- and
- a third transistor connected at one end to the other end of the second transistor and having the other end to which a reference potential is supplied,
- wherein film thicknesses of gate oxide films of the antifuse element, the first transistor, the second transistor, and the third transistor are about equal, and
- in a case where the write voltage that breaks the gate oxide film of the antifuse element is applied to the first terminal and the gate oxide film of the antifuse element is not broken, a potential that makes a potential difference between the first terminal and the other end of the antifuse element less than a potential that breaks the gate oxide film of the antifuse element is applied to a gate of the first transistor.
A semiconductor storage device comprising:
- an antifuse element connected at one end to a first terminal to which a write voltage is applicable, and including a gate oxide film;
- a first element connected to the other end of the antifuse element, wherein the first element is a level shifter circuit;
- a fourth transistor connected at one end to the other end of the antifuse element and
- a fifth transistor connected at one end to the other end of the fourth transistor and having the other end to which a reference potential is supplied,
- wherein film thicknesses of gate oxide films of the antifuse element, the fourth, and the fifth transistor are about equal, and
- in a case where the write voltage that breaks the gate oxide film of the antifuse element is applied to the first terminal and the gate oxide film of the antifuse element is not broken, the level shifter circuit supplies the second potential that makes a potential difference between the first terminal and the other end of the antifuse element less than a potential that breaks the gate oxide film of the antifuse element.
A control method of a semiconductor storage device including an antifuse element that is connected at one end to a first terminal to which a write voltage is applicable and that has a gate oxide film,
- a first element connected to the other end of the antifuse element, wherein the first element is a first transistor connected at one end to the other end of the antifuse element;
- a second transistor connected at one end to the other end of the first transistor;
- and
- a third transistor connected at one end to the other end of the second transistor and having the other end to which a reference potential is supplied,
- wherein film thicknesses of gate oxide films of the antifuse element, the first transistor, the second transistor, and the third transistor are about equal, the method comprising,
- in a case where the write voltage that breaks the gate oxide film is applied to the first terminal and the gate oxide film is not broken,
- dividing a voltage between the other end of the antifuse element and the other end of the third transistor by the first transistor, the second transistor, and the third transistor, and
- controlling the first element to supply a second potential that makes a potential difference between the one end and the other end of the antifuse element less than a potential that breaks the gate oxide film of the antifuse element, to the other end.
Dependencies are inferred from the claim text.