Shift register, display device, and method for controlling shift register
AssigneeSharp Kabushiki Kaisha
InventorNobuyuki Taya
Life of this patent
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Abstract
As a scanning line drive circuit of a display device, a shift register having a configuration in which a plurality of unit circuits are connected to each other in multiple stages is used. The unit circuits each include: a plurality of control transistors; an internal node connected to a terminal of one of the plurality of control transistors; and a depletion mode initialization transistor having a first conduction terminal connected directly or through a resistor to the internal node, a second conduction terminal, and a control terminal. One of a power supply voltage and a ground voltage is applied to the second conduction terminal, and the other voltage is applied to the control terminal. The initialization transistor is turned on in a power-off state.
Claims20
A shift register having a configuration in which a plurality of unit circuits are connected to each other in multiple stages, wherein
- the plurality of unit circuits each include:
- a plurality of control transistors;
- an internal node connected to a terminal of one of the plurality of control transistors;
- and
- a depletion mode initialization transistor having a first conduction terminal connected directly or through a resistor to the internal node, a second conduction terminal, and a control terminal,
- one of a power supply voltage and a ground voltage is applied to the second conduction terminal,
- another one of the power supply voltage and the ground voltage is applied to the control terminal, and
- the initialization transistor is turned on in a power-off state.
A method for controlling a shift register having a configuration in which a plurality of unit circuits are connected to each other in multiple stages, the plurality of unit circuits each including a plurality of control transistors, an internal node connected to a terminal of one of the plurality of control transistors, and a depletion mode initialization transistor having a first conduction terminal connected directly or through a resistor to the internal node, a second conduction terminal, and a control terminal, the method comprising:
- allowing the shift register to operate by applying one of a power supply voltage and a ground voltage to the second conduction terminal, and applying another one of the power supply voltage and the ground voltage to the control terminal;
- and
- bringing the initialization transistor into an on state by stopping supply of the power supply voltage.
Dependencies are inferred from the claim text.