Logic simulation verification system, logic simulation verification method, and program

A logic simulation verification method, comprising:

• designating a reference signal as a reference timing for a change of a signal based on information stored in a timing information storage unit included in a storage medium;
• calculating a first time at which there is a possibility that a first signal to be assigned to a variable described in a library, a circuit description, and a test bench is changed in accordance with the reference signal based on information stored in an input information data storage unit included in the storage medium;
• calculating a second time at which there is a possibility that a second signal assigned a variable described in the library, the circuit description, and the test bench is checked in accordance with the reference signal based on the information stored in the input information data storage unit included in the storage medium;
• determining whether different circuits for which first signals are the same have first times that match, and outputting a message to a message storage unit;
• and
• determining whether a first time and a second time match with each other when a first signal of one circuit and a second signal of another circuit are the same, and outputting the message to the message storage unit.

A non-transitory computer readable storage medium storing program instructions that when executed by a computer in a logic simulation verification system causes the computer to perform a method comprising:

• designating a reference signal as a reference timing for a change of a signal based on information stored in a timing information storage unit included in a storage medium;
• calculating a first time at which there is a possibility that a first signal to be assigned to a variable described in a library, a circuit description, and a test bench is changed in accordance with the reference signal based on information stored in an input information data storage unit included in the storage medium;
• calculating a second time at which there is a possibility that a second signal assigned a variable described in the library, the circuit description, and the test bench is checked in accordance with the reference signal based on the information stored in the input information data storage unit included in the storage medium;
• determining whether different circuits for which first signals are the same have first times that match, and outputting a message to a message storage unit;
• and
• determining whether a first time and a second time match with each other when a first signal of one circuit and a second signal of another circuit are the same, and outputting the message to the message storage unit.