Security systems and methods for integrated circuits

A system for verifying integrity of content, the system being operative in conjunction with an integrated circuit including at least one memory and a multiplicity of registers, the system comprising:

• register content verification logic configured for:
• when in a Study Mode, reading content from at least some of the multiplicity of registers, in said integrated circuit, which configure and control the integrated circuit, for computing a first hash on said content, and for storing said first hash thereby to provide an up-to-date reference hash, and,
• at least once, when in a Verify Mode, verifying the integrity of at least some of the integrated circuit's registers for computing at least one second hash on said content, for comparing said at least one second hash to said reference hash and, accordingly, for providing a content verification output indicative of whether said reference hash and said at least one second hash are equal,
• wherein each time the reference and second hashes are not equal, the content verification output causes at least one action to be performed by being received by at least one of:
• firmware which, responsively, triggers said least one action;
• and
• hardware which performs said least one action,
• wherein said action comprises halting a device incorporating the integrated circuit until the device has been powered off and switched back on.