Management of access restriction within a system on chip
AssigneeSTMicroelectronics (Rousset) SAS
InventorsEmmanuel Ardichvili, Laurent Lestringand, Patrick Valdenaire
Life of this patent
Estimating the term…
Loading patent…
AssigneeSTMicroelectronics (Rousset) SAS
InventorsEmmanuel Ardichvili, Laurent Lestringand, Patrick Valdenaire
Estimating the term…
A system includes a plurality of items of master equipment, each having a programing interface, and a plurality of slave equipment. An interconnect circuit is coupled between the items of master equipment and the items of slave equipment. Each transaction is assigned an attribute capable of taking on at least two attribute values corresponding to at least two states for the master equipment. Each item of slave equipment is associated with an identifier capable of taking on at least two values corresponding respectively to at least two properties for the slave equipment. Each item of master equipment automatically inherits the property of its programing interface. A filtering circuit is configured to, in the presence of a transaction intended for an item of slave equipment, compare the corresponding attribute value with an identifier value of the intended slave equipment and reject or not reject the transaction based on the comparison.
A system-on-chip comprising:
A method for access management of a system-on-chip having comprising a plurality of items of master equipment and a plurality of items of slave equipment, the method comprising:
A microcontroller comprising:
Dependencies are inferred from the claim text.