US 11,386,008 B1Granted

False hit detection in ternary content-addressable memory

AssigneeAmazon Technologies, Inc.

InventorsAnna Rom-Saksonov, Erez Izenberg, Avigdor Segal, Jonathan Cohen, Nitzan Zisman, Noam Attias

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Abstract

A memory apparatus for detecting false hits in a content-addressable memory (CAM) is disclosed. The memory apparatus includes a controller coupled to the CAM and a memory. The controller receives a search result including an address from the CAM, the address corresponding to a matching entry from a first set of data entries that matches a search tag. The controller provides a read address based on the address to the memory, which returns a second data entry from a second set of data entries corresponding to the read address. The controller receives the read data and generates an error detection result based on a comparison between the second data entry and the search tag.

Claims20

Dependent claims

A memory apparatus comprising:

a ternary content-addressable memory (TCAM) comprising a first set of data entries that are stored at a first set of addresses, wherein the TCAM is configured to receive a search tag, find a first data entry from the first set of data entries that matches the search tag, and return a search result that includes an address from the first set of addresses corresponding to the first data entry;
a random-access memory (RAM) comprising a second set of data entries that are stored at a second set of addresses, wherein the RAM is configured to receive the address returned by the TCAM and return read data that includes a second data entry from the second set of data entries corresponding to the address;
and
a TCAM controller communicatively coupled to the TCAM and the RAM, wherein the TCAM controller is configured to:
receive the search tag to be searched within the TCAM;
provide the search tag to the TCAM;
receive the search result including the address from the TCAM;
provide the address to the RAM;
receive the read data including the second data entry from the RAM;
perform a comparison between the search tag provided as an input to the TCAM and the second data entry received as an output from the RAM;
and
generate an error detection result based on the comparison between the second data entry and the search tag.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/018,105Filed 11 Sep 2020
Granted: 12 Jul 2022
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

G06F 12/0846
Multiple simultaneous or quasi-simultaneous cache accessing: cache with multiple tag or data arrays being simultaneously accessible
G06F 11/0772
Error or fault reporting or storing: means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
G06F 11/1064
In individual solid state devices: in cache or content addressable memories
G06F 12/0246
Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory: in block erasable memory, e.g. flash memory