Memory system, memory controller and method for operating memory system in which different processors search for mapping information using different map search engines

A memory controller comprising:

• a memory interface configured to communicate with a memory device;
• and
• a control circuit configured to control the memory device,
• the control circuit comprising:
• a first processor configured to determine a processor, which is a target to process a read operation on a target logical address among logical addresses indicated by read commands, among multiple processors, in which the first processor is included, based on the target logical address, and process a write operation on a logical address indicated by a write command;
• and
• a second processor, among the multiple processors, configured to process a read operation on a target logical address selected by the first processor among the logical addresses indicated by the read commands,
• wherein the first processor searches for mapping information on a logical address corresponding to a read operation or a write operation to be processed by the first processor by using a first map search engine, and
• wherein the second processor searches for mapping information on the target logical address by using a second map search engine.

A method for operating a memory system, comprising:

• determining, by a first processor, a processor, which is a target to process a read operation on a target logical address among logical addresses indicated by read commands, among multiple processors, in which the first processor is included, based on the target logical address;
• processing, by the first processor, a write operation on a logical address indicated by a write command;
• selecting, by the first processor, the target logical address among the logical addresses indicated by the read commands;
• processing, by a second processor, among the multiple processors, the read operation on the target logical address;
• searching, by the first processor, for mapping information on a logical address corresponding to a read operation or a write operation to be processed by the first processor by using a first map search engine;
• and
• searching, by the second processor, for mapping information on the target logical address by using a second map search engine.