General purpose input/output with hysteresis
AssigneeApple Inc.
InventorsPeter F. Holland, Hari Ganesh R. Thirunageswaram
Life of this patent
Estimating the term…
Abstract
In an embodiment, an integrated circuit includes one or more GPIO pins coupled to a GPIO block in the integrated circuit. At least a first GPIO pin may include corresponding logic circuitry that may be programmed to apply one or more requirements to changes of the digital value received on the first GPIO pin before the change is forwarded to a destination within the integrated circuit. That is, if the requirements are not met for a given change, the logic circuitry may suppress the given change so that it is not provided to other circuits internal to the integrated circuit (e.g. the destination circuit that receives communication via the GPIO pins). The one or more requirements may be a form of hysteresis, for example.
Claims20
An integrated circuit comprising:
- a pin configurable as a general purpose input/output (GPIO);
- a receiver circuit coupled to the pin and configured to convert a signal on the pin to a digital value representing the signal on the pin;
- and
- a logic circuit coupled to the receiver circuit, wherein the logic circuit is programmable with one or more values specifying one or more requirements on a first change to the digital value, wherein the logic circuit is configured to suppress the first change in the digital value generated by the receiver circuit from being forwarded to a destination within the integrated circuit unless the one or more requirements are met by the first change in the digital value.
A method comprising:
- converting, by a receiver circuit in an integrated circuit, a signal on a pin of the integrated circuit to a digital value representing the signal;
- applying, by a logic circuit coupled to the receiver circuit, one or more requirements to changes of the digital value;
- detecting, by the logic circuit, that at least one of the one or more requirements is not met by a first change of the digital value;
- and
- suppressing, by the logic circuit, the first change of the digital value from propagating to a destination within the integrated circuit responsive to detecting that at least one of the one or more requirements is not met by a first change of the digital value.
A system comprising:
- a first component;
- a first integrated circuit coupled to the first component via a first pin configurable as a general purpose input/output (GPIO) for the first integrated circuit, wherein the first integrated circuit is configured to generate a digital value corresponding to a signal provided by the first component on the pin, and wherein the first integrated circuit is programmable to specify one or more requirements on a first change to the digital value, wherein the first integrated circuit is configured to suppress forwarding of the first change in the digital value generated from the signal unless the one or more requirements are met by the first change in the digital value.
Dependencies are inferred from the claim text.