Host accelerated operations in managed NAND devices
AssigneeMicron Technology, Inc.
InventorSebastien Andre Jean
Life of this patent
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Abstract
Devices and techniques for host accelerated operations in managed NAND devices are described herein. A read request is received at a controller of a NAND device. Here, the read request includes a logical address and a physical address. A a verification component that corresponds to the physical address is retrieved a NAND array of the NAND device. A verification of the read request is computed using the logical address, the physical address, and the verification component. A read operation is then modified based on the verification.
Claims23
A controller for a memory device, the controller comprising:
- a host interface configured to communicate with a host device;
- processing circuitry configured to:
- receive, from the host interface, a request to read data from storage, the request including both a logical address for the data and a physical address for the data in the storage;
- retrieve a verification component that corresponds to the physical address taken from the request;
- verify that the physical address is correct based on the request and the verification component;
- and
- preform the read for the request without consulting a logical-to-physical mapping held by the controller based on verifying that the physical address is correct.
The controller of 1, wherein the verification component is the logical address.
The controller of 3, wherein, to verify that the physical address is correct based on the request and the verification component, the processing circuitry is configured to:
- compare bits of the logical address taken from the request to the verification component;
- and
- determine that the physical address is correct when the bits match and determine that the physical address is not correct otherwise.
The controller of 1, wherein the verification component is a hash of the logical address, the physical address, or of both the logical address and the physical address.
The controller of 5, wherein, to verify that the physical address is correct based on the request and the verification component, the processing circuitry is configured to:
- create the hash from the logical address, the physical address, or both the logical address and the physical address taken from the request;
- compare bits of the hash created from the request to the verification component;
- and
- determine that the physical address is correct when the bits match and determine that the physical address is not correct otherwise.
A system comprising:
- a host interface configured to communicate with a host device;
- a storage array;
- and
- processing circuitry configured to:
- receive, from the host interface, a request to read data from the storage array, the request including a physical address;
- retrieve, from the storage array, a component that corresponds to the physical address taken from the request;
- verify that the physical address is correct based on the request and the component;
- and
- return, through the host interface, the data to complete the request without using a logical-to-physical mapping based on verifying that the physical address is correct.
Dependencies are inferred from the claim text.