US 11,385,797 B2 · Solid state storage device with variable logical capacity based on memory lifecycle

Abstract

Several embodiments of memory devices and systems having a variable logical memory capacity are disclosed herein. In one embodiment, a memory device can include a plurality of memory regions that collectively define a physical memory capacity and a controller operably coupled to the plurality of memory regions. The controller is configured to advertise a first logical memory capacity to a host device, wherein the first logical memory capacity is less than the physical memory capacity, determine that at least one of the memory regions is at or near end of life, and in response to the determination, (1) retire the at least one of the memory regions and (2) reduce a logical memory capacity of the host device to a second logical memory capacity that is less than the first logical memory capacity.

Claims19

Dependent claims

A memory device, comprising:

a plurality of memory regions collectively defining a physical memory capacity;
and
a controller operably coupled to the memory regions, wherein the controller is configured to—
advertise a first logical memory capacity to a host device, wherein the first logical memory capacity is less than the physical memory capacity,
determine that at least one of the memory regions is at or near end of life,
in response to the determination:
send a notification to the host device that a logical memory capacity of the memory device will be reduced,
after sending the notification, retire the at least one of the memory regions, and
reduce the logical memory capacity of the memory device to a second logical memory capacity that is less than the first logical memory capacity, whereby the memory device with the reduced logical capacity is recognized as a different device by the host device.

6 more elements

A controller for operably coupling a host device to a storage device that has a physical memory capacity, the controller comprising:

a processor;
and
internal memory coupled to the processor and including instructions that, when executed by the processor, performs a method that includes:
advertising a first logical memory capacity to the host device, wherein the first logical memory capacity (1) represents a storage capacity of the storage device that is accessible to the host device and (2) is less than the physical memory capacity,
determining that at least one memory regions in the storage device is at or near end of life,
in response to the determination:
sending a notification to the host device that a logical memory capacity of the storage device will be reduced,
after sending the notification, retiring the at least one of the memory regions, and
reducing the logical memory capacity of the storage device to a second logical memory capacity that is less than the first logical memory capacity, whereby the memory device with the reduced logical capacity is recognized as a different device by the host device.

6 more elements

Dependencies are inferred from the claim text.

Solid state storage device with variable logical capacity based on memory lifecycle

Life of this patent

Solid state storage device with variable logical capacity based on memory lifecycle

Life of this patent

Abstract

Claims19