Method and system for providing a sleep mode to a configurable logic block using an intermittent power saving logic
AssigneeGOWIN Semiconductor Corporation
InventorJinghui Zhu
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AssigneeGOWIN Semiconductor Corporation
InventorJinghui Zhu
Estimating the term…
A programmable semiconductor integrated circuit fabricated on a single microchip device capable of being selectively programmed to perform one or more logic functions provides a sleep mode using an intermittent power saving logic. The circuit includes configurable logic blocks (“LB”), memory, switch, and sleep controller. While LB can enter a power saving sleep mode (“PSSM”) in accordance with its power supply, the memory stores the configuration information for the LB. The switch is configured to manage the LB power supply based on a configurable sleep signal for facilitating the PSSM. The sleep controller facilitates generation of the configurable sleep signal in response to the signal from a power saving output port associated with the LB.
A semiconductor device selectively programmed to perform one or more logic functions with a power saving block, comprising:
An apparatus containing programmable logic blocks having a power saving logic, comprising:
A method of semiconductor chip periodically restoring at least a portion of a programmable logic device from a power saving mode, the method comprising:
Dependencies are inferred from the claim text.