Voltage drop management for VLSI and SoC

A semiconductor chip, comprising:

• a plurality of voltage comparators each configured to compare a power supply voltage to a respective reference voltage;
• a sampler and counter circuit configured to collect voltage information and timing information from the plurality of voltage comparators;
• a decision matrix configured to determine whether a voltage drop event has occurred based on the voltage information and duration information associated with a voltage drop event reported from the sampler and counter circuit, and generate diagnostic information that includes whether the voltage drop event is an external event or an internal event determined based on the voltage information and the timing information reported from the sampler and counter circuit;
• and
• a processor configured to take an action based on the diagnosis information from the decision matrix.

A semiconductor chip, comprising:

• a plurality of voltage comparators each configured to compare a power supply voltage to a respective reference voltage;
• a sampler and counter circuit configured to collect voltage information and timing information from the plurality of voltage comparators;
• and
• a processor configured to:
• determine whether a voltage drop event has occurred based on the voltage information and duration information associated with a voltage drop event reported from the sampler and counter circuit,
• generate diagnostic information that includes whether the voltage drop event is an external event or an internal event determined based on the voltage information and the timing information reported from the sampler and counter circuit;
• and
• take an action based on the diagnosis information.