Single-counter, multi-trigger systems and methods in communication systems
AssigneeQUALCOMM Incorporated
InventorsLalan Jee Mishra, Richard Dominic Wietfeldt
Life of this patent
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Abstract
Single-counter, multi-trigger systems and methods in communication systems consolidate tracking of multiple trigger events into a single counter in place of plural counters. The single counter may track multiple trigger events for a single triggered element. Likewise, the single counter may track trigger events for a plurality of triggered elements. By consolidating tracking of trigger events with reference to a single counter, the size of the circuit may be reduced and power savings may be achieved.
Claims21
An integrated circuit (IC), comprising:
- a bus interface configured to be coupled to a bus and configured to receive a datagram having multiple set-point comparison values and a trigger window, wherein the trigger window comprises a smallest power of two greater than a largest event time corresponding to a set-point comparison value, the datagram received from a host through the bus;
- a counter configured to use the trigger window to begin a count;
- a plurality of comparators, each comparator comprising a set-point register configured to store a plurality of set-point comparison values based on the datagram, each comparator coupled to the counter and configured to compare a value from the counter to at least one of the plurality of set-point comparison values in the set-point register and output a signal when there is a match;
- a plurality of shadow registers, each shadow register coupled to a respective one of the plurality of comparators and configured to receive the signal from the respective comparator;
- and
- a plurality of trigger elements, each trigger element coupled to a respective one of the plurality of shadow registers and configured to receive a register value stored in the respective shadow register when the respective shadow register receives the signal from the respective comparator.
A method for controlling a trigger element in a slave integrated circuit (IC) coupled to a bus, the method comprising:
- loading a plurality of set-point values into a set-point register using a datagram sent from a host through the bus;
- loading a trigger window into a counter from the datagram, wherein the trigger window comprises a smallest power of two greater than a largest event time corresponding to a set-point value;
- when an output from the counter matches at least one set-point value of the plurality of set-point values in the set-point register in one of a plurality of comparators, outputting a signal to at least one of a plurality of shadow registers;
- and
- responsive to receiving the signal from the one of the plurality of comparators, loading a value from the at least one of the plurality of shadow registers to the trigger element.
A radio frequency front end (RFFE) system, comprising:
- a host integrated circuit (IC) configured to calculate a trigger window as a smallest power of two based on a largest event corresponding to a set-point comparison value;
- an RFFE bus coupled to the host IC;
- and
- a slave IC, the slave IC coupled to the RFFE bus, and comprising:
- a bus interface configured to be coupled to the RFFE bus and configured to receive a datagram having multiple set-point comparison values and the trigger window from the host IC through the RFFE bus;
- a counter configured to use the trigger window to begin a count;
- a plurality of comparators, each comparator comprising a set-point register configured to store a plurality of set-point comparison values based on the datagram, each comparator coupled to the counter and configured to compare a value from the counter to at least one of the plurality of set-point comparison values in the set-point register and output a signal when there is a match;
- a plurality of shadow registers, each shadow register coupled to a respective one of the plurality of comparators and configured to receive the signal from the respective comparator;
- and
- a plurality of trigger elements, each trigger element coupled to a respective one of the plurality of shadow registers and configured to receive a register value stored in the respective shadow register when the respective shadow register receives the signal from the respective comparator.
Dependencies are inferred from the claim text.