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US 11,385,667 B2Granted
Low dropout regulator with non-linear biasing and current clamping circuit
AssigneeQUALCOMM Incorporated
InventorsKuan Chuang Koay, Hua Guan, YuFei Pan
Life of this patent
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Abstract
An LDO regulator is provided that includes a bias circuit that generates a bias current having a non-linear relationship to an output current for the LDO regulator. The LDO regulator is also configured to clamp the output current.
Claims19
A low dropout (LDO) regulator, comprising:
- a differential amplifier configured to generate an error signal on an output node responsive to a difference between a feedback signal and a reference signal;
- a clamped current mirror including a current source configured to source a reference current, wherein the clamped current mirror is configured to mirror an output current of the LDO regulator into a clamped mirrored current that is proportional to the output current responsive to the output current being less than a threshold value and that is proportional to the reference current responsive to the output current being greater than the threshold value;
- a capacitor coupled to the output node;
- and
- a variable resistor in series with the capacitor and configured to vary a variable resistance responsive to the clamped mirrored current.
2 more elements
A low dropout (LDO) regulator, comprising:
- a differential amplifier having an output node, the differential amplifier being configured to drive an error voltage signal on the output node responsive to a difference between a reference voltage and a feedback voltage;
- a bias circuit configured to generate a bias current that is proportional to an output current for the LDO regulator according to a first linear proportionality while the bias current is less than a threshold level and according to a second linear proportionality while the bias current is greater than the threshold level, wherein the second linear proportionality is less than the first linear proportionality, and wherein the bias circuit includes a diode-connected transistor configured to conduct the bias current;
- a capacitor coupled to the output node;
- and
- a variable resistance transistor coupled to the capacitor and having a gate coupled to a gate of the diode-connected transistor.
2 more elements
A low dropout regulator, comprising:
- a clamped transconductor including a first transistor and a current source configured to source a reference current, wherein the clamped transconductor is configured to transconduct an error voltage signal into a clamped transconductance current according to a transconductance of the first transistor while the error voltage signal is less than a threshold value and to clamp the clamped transconductance current at a clamped value while the error voltage signal is greater than the threshold value, and wherein the clamped value is proportional to the reference current voltage signal;
- an output capacitor;
- and
- a pass transistor configured to conduct an output current that is proportional to the clamped transconductor current to charge the output capacitor with an output voltage.
1 more element
A method for a low dropout (LDO) regulator, comprising:
- generating a bias current proportionally to an output current for the LDO regulator according to a first linear proportionality while the output current is less than a threshold level;
- generating the bias current proportionally to the output current according to a second linear proportionality while the output current is greater than the threshold level, wherein the second linear proportionality is less than the first linear proportionality;
- conducting a mirrored version of the bias current through a transistor to adjust a variable resistance of a resistor-capacitor (RC) circuit including the transistor;
- and
- biasing an output node of a differential amplifier in the LDO regulator with the RC circuit.
2 more elements
Dependencies are inferred from the claim text.