Multiplexing distinct signals on a single pin of a memory device
AssigneeMicron Technology, Inc.
InventorsRobert Nasry Hasbun, Timothy M. Hollis, Jeffrey P. Wright, Dean D. Gans
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Abstract
Methods, systems, and devices for multiplexing distinct signals on a single pin of a memory device are described. Techniques are described herein to multiplex data using a modulation scheme having at least three levels. The modulated data may be communicated to multiple memory dies over a shared bus. Each of the dies may include a same or different type of memory cell and, in some examples, a multi-level signaling scheme may be pulse amplitude modulation (PAM). Each unique symbol of the modulated signal may be configured to represent a plurality of bits of data.
Claims20
An apparatus, comprising:
- a first memory die coupled with a bus;
- a second memory die coupled with the bus;
- a multiplexer coupled with the bus and configured to multiplex first data associated with the first memory die and second data associated with the second memory die into a signal, a single symbol of the signal comprising at least a portion of the first data and at least a portion of the second data;
- and
- a memory controller coupled with the bus and configured to:
- receive a data request for the first data and the second data, and
- transmit the first data to the first memory die and the second data to the second memory die through the bus based at least in part on receiving the data request, wherein the first data or the second data comprises control data that includes information for operating the first memory die or the second memory die.
A method, comprising:
- receiving a request for first data to be transmitted to a first memory die and second data to be transmitted to a second memory die;
- multiplexing the first data and the second data into a signal based at least in part on receiving the request for the first data and the second data to be transmitted to the first memory die and the second memory die, a single symbol of the signal comprising at least a portion of the first data associated with the first memory die and at least a portion of the second data associated with the second memory die;
- and
- transmitting the signal to the first memory die and the second memory die over a bus coupled with the first memory die and the second memory die based at least in part on multiplexing the first data and the second data, wherein the first data or the second data comprises control data that includes information for operating the first memory die or the second memory die.
An apparatus, comprising:
- a first memory die coupled with a bus;
- a second memory die coupled with the bus, wherein the second memory die comprises a different type of memory device than the first memory die;
- and
- a memory controller coupled with the bus and operable to:
- receive a request for first data to be transmitted to the first memory die and second data to be transmitted to the second memory die;
- multiplex the first data and the second data into a signal based at least in part on receiving the request, a single symbol of the signal comprising at least a portion of the first data associated with the first memory die and at least a portion of the second data associated with the second memory die;
- and
- transmit the signal to the first memory die and the second memory die based at least in part on multiplexing the first data and the second data, wherein the first data or the second data comprises control data that includes information for operating the first memory die or the second memory die.
Dependencies are inferred from the claim text.