Vertical layered finite alphabet iterative decoding
AssigneeCodelucida, Inc.
InventorsBenedict J. Reynwar, David Declercq, Shiva Kumar Planjery
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Abstract
This invention presents a method and apparatus for vertical layered finite alphabet iterative decoding of low-density parity-check codes (LDPC) which operate on parity check matrices that consist of blocks of sub-matrices. The iterative decoding involves passing messages between variable nodes and check nodes of the Tanner graph that associated with one or more sub-matrices constitute decoding blocks, and the messages belong to a finite alphabet. Various embodiments for the method and apparatus of the invention are presented that can achieve very high throughputs with low hardware resource usage and power.
Claims14
A method for vertical layered finite alphabet iterative decoding of low-density parity-check (LDPC) codes, the method comprising:
- receiving, as a first set of inputs, channel values belonging to a channel output alphabet;
- using the first set of inputs for initializing, iteratively decoding and validating on one or more sub-matrices of a parity-check matrix constituting a plurality of decoding blocks, the initializing, decoding and validating performed on the plurality of decoding blocks in arbitrary order and sequentially from one decoding block to another decoding block either within a column block or across one or more column blocks;
- computing, during the initializing, syndrome bits based on the first set of inputs, the syndrome bits initializing check nodes associated with the one or more sub-matrices in the plurality of decoding blocks;
- iteratively processing, during a decoding loop and using the syndrome bits computed during the initializing as inputs, the one or more sub-matrices of the parity-check matrix constituting the plurality of decoding blocks, wherein the iterative processing includes:
- computing, updating, and passing messages belonging to a finite alphabet, wherein the messages are iteratively passed between variable nodes and the check nodes associated with the one or more sub-matrices in the decoding blocks;
- using a plurality of variable node update functions to compute outgoing messages of the variable nodes, wherein the said variable node update functions are the same from one decoding block to the next decoding block or are dynamically switched to different variable node update functions from one decoding block to the next decoding block;
- using one or more check node update functions to compute outgoing messages of the check nodes;
- and
- computing hard-decision estimates at the variable nodes based on the outgoing messages of the check nodes;
- computing the syndrome bits from the hard-decision estimates during validating to check whether the hard-decision estimates constitute a codeword;
- outputting the codeword, in accordance with the hard-decision estimates constituting a codeword;
- and
- transmitting the codeword by one or more communication or storage systems.
Dependencies are inferred from the claim text.