Method of detecting jitter in clock of apparatus and apparatus utilizing same

An apparatus of detecting jitter, the apparatus comprising:

• a phase-locked loop comprising
• a phase detector configured to generating a lead control signal and a lag control signal according to a reference clock and a feedback clock;
• a charge pump coupled to the phase detector, and configured to generate an intermediate voltage according to the lead control signal and the lag control signal;
• a filter coupled to the charge pump, and configured to filter the intermediate voltage to generate a filtered voltage;
• a voltage-controlled oscillator coupled to the filter, and configured to generate an oscillation signal according to the filtered voltage;
• and
• a feedback unit coupled to the voltage-controlled oscillator and the phase detector, and configured to generate the feedback clock according to the oscillation signal;
• and
• an output unit coupled to the voltage-controlled oscillator, and configured to output a clock signal according to the oscillation signal;
• and
• a jitter detection circuit coupled to the phase detector, and comprising:
• a jitter extraction circuit configured to generate a jitter signal according to the lead control signal and the lag control signal;
• a jitter window circuit coupled to the jitter extraction circuit, and configured to generate a jitter window signal according to the jitter signal;
• a jitter identification circuit coupled to the jitter extraction circuit and the jitter window circuit, and configured to generate a jitter by extracting an overlapping portion of a pulse of the jitter signal and a pulse of the jitter window signal;
• and
• a jitter indication circuit coupled to the jitter identification circuit and configured to output a jitter indication signal according to a quantity of jitters.