Amplifier, and receiving circuit, semiconductor apparatus and semiconductor system including the amplifier
AssigneeSK hynix Inc.
InventorJi Hyo Kang
Life of this patent
Estimating the term…
Abstract
An amplifier includes a first input circuit, a second input circuit, a first compensation circuit, a second compensation circuit. The first input circuit changes a voltage level of the negative output node based on a first input signal. The second input circuit changes a voltage level of the positive output node based on a second input signal. The first compensation circuit changes the voltage level of the positive output node based on the first input signal. The second compensation circuit changes the voltage level of the negative output node based on the second output signal.
Claims21
An amplifier comprising:
- a first input circuit coupled between a negative output node and a first common node, the negative output node coupled to a first supply voltage terminal, the first common node coupled to a second supply voltage terminal, and the first input circuit configured to change a voltage level of the negative output node based on a first input signal;
- a second input circuit coupled between a positive output node and a second common node, the positive output node coupled to the first supply voltage terminal, the second common node coupled to the second supply voltage terminal, and the second input circuit configured to change a voltage level of the positive output node based on a second input signal;
- a first compensation circuit coupled between the positive output node and the first common node, and configured to delay the first input signal to generate a first delayed input signal and change the voltage level of the positive output node based on the first delayed input signal;
- a second compensation circuit coupled between the negative output node and the second common node, and configured to delay the second input signal to generate a second delayed input signal and change the voltage level of the negative output node based on the second delayed input signal;
- and
- a source resistor coupled between the first and second common nodes.
An amplifier comprising:
- a first input circuit coupled between a negative output node and a first common node, the negative output node coupled to a first supply voltage terminal, the first common node coupled to a second supply voltage terminal, and the first input circuit configured to change a voltage level of the negative output node based on a first input signal;
- a second input circuit coupled between a positive output node and a second common node, the positive output node coupled to the first supply voltage terminal, the second common node coupled to the second supply voltage terminal, and the second input circuit configured to change a voltage level of the positive output node based on a second input signal;
- a first delay circuit configured to generate a first delayed input signal by delaying the first input signal;
- a second delay circuit configured to generate a second delayed input signal by delaying the second input signal;
- a third input circuit coupled between the positive output node and the first common node, and configured to change the voltage level of the positive output node based on the first delayed input signal;
- a fourth input circuit coupled between the negative output node and the second common node, and configured to change the voltage level of the negative output node based on the second delayed input signal;
- and
- an equalization circuit coupled between the first and second common nodes.
An amplifier comprising:
- a first input circuit coupled between a negative output node and a first common node, the negative output node coupled to a first supply voltage terminal, the first common node coupled to a second supply voltage terminal, and the first input circuit configured to change a voltage level of the negative output node based on a first input signal;
- a second input circuit coupled between a positive output node and a second common node, the positive output node coupled to the first supply voltage terminal, the second common node coupled to the second supply voltage terminal, and the second input circuit configured to change a voltage level of the positive output node based on a second input signal;
- a first compensation circuit coupled between the positive output node and the first common node, and configured to change the voltage level of the positive output node by receiving the first input signal;
- a second compensation circuit coupled between the negative output node and the second common node, and configured to change the voltage level of the negative output node by receiving the second input signal;
- a source resistor coupled between the first and second common nodes;
- a first current source coupled between the first common node and the second supply voltage terminal;
- and
- a second current source coupled between the second common node and the second supply voltage terminal.
Dependencies are inferred from the claim text.