Termination structure for insulated gate semiconductor device and method

A semiconductor device structure, comprising:

• a region of semiconductor material comprising:
• a first conductivity type;
• a first major surface;
• a second major surface opposite to the first major surface;
• an active region;
• and
• a termination region;
• an active structure disposed in the active region comprising:
• a first active trench extending from the first major surface into the region of semiconductor material to a first depth;
• and
• a first conductive structure within the first active trench and electrically isolated from the region of semiconductor material by a first dielectric structure, wherein the first active trench has a first width proximate to the first major surface;
• a termination structure disposed in the termination region comprising:
• a first termination trench extending from the first major surface into the region of semiconductor material to a second depth;
• a second conductive structure within the first termination trench and electrically isolated from the region of semiconductor material by a second dielectric structure;
• a second termination trench extending from the first major surface into the region of semiconductor material to a third depth;
• and
• a third conductive structure within the second termination trench and electrically isolated from the region of semiconductor material by a third dielectric structure, wherein:
• the first termination trench comprises:
• a second width proximate to the first major surface;
• a first side surface;
• a second side surface opposite to the first side surface;
• and
• a first lower surface extending between the first side surface and the second side surface;
• the first side surface is interposed between the second side surface and the first active trench;
• and
• the second conductive structure comprises:
• a first conductive spacer disposed proximate to the first side surface of the first termination trench;
• and
• a second conductive spacer disposed proximate to the second side surface of the first termination trench;
• and
• the second termination trench comprises:
• a third width proximate to the first major surface;
• a third side surface;
• a fourth side surface opposite to the third side surface;
• and
• a second lower surface extending between the third side surface and the fourth side surface;
• the third side surface is interposed between the fourth side surface and the first active trench;
• the third conductive structure comprises:
• a third conductive spacer disposed proximate to the third side surface;
• and
• a fourth conductive spacer disposed proximate to the fourth side surface
• a dielectric layer disposed overlying a portion of the first major surface, the first conductive spacer, the first lower surface, the second conductive spacer, the third conductive spacer, the second lower surface, and the fourth conductive spacer;
• a contact structure disposed adjacent the first major surface on opposing sides of the first active trench;
• and
• a first conductive layer disposed overlying the first major surface and electrically coupled to the contact structure.

A method for forming a semiconductor device structure, comprising:

• providing a region of semiconductor material comprising:
• a first conductivity type;
• a first major surface;
• a second major surface opposite to the first major surface;
• an active region;
• and
• a termination region;
• providing an active structure disposed in the active region comprising:
• a first active trench extending from the first major surface into the region of semiconductor material;
• and
• a first conductive structure within the first active trench and electrically isolated from the region of semiconductor material by a first dielectric structure;
• providing a termination structure disposed in the termination region comprising:
• a first termination trench extending from the first major surface into the region of semiconductor material;
• a second conductive structure within the first termination trench and electrically isolated from the region of semiconductor material by a second dielectric structure, wherein:
• the first termination trench comprises:
• a first side surface;
• a second side surface opposite to the first side surface;
• and
• a first lower surface extending between the first side surface and the second side surface;
• the first side surface is interposed between the second side surface and the first active trench;
• and
• the second conductive structure comprises a first conductive spacer disposed proximate to the first side surface of the first termination trench;
• and
• a dielectric layer disposed overlying a portion of the first major surface and overlapping the first conductive spacer;
• providing a first doped region comprising a second conductivity type opposite the first conductive type in the region of semiconductor material adjacent to the first lower surface of the first termination trench;
• providing a contact structure having a first portion disposed adjacent to the first major surface on opposing sides of the first active trench;
• and
• providing a first conductive layer disposed overlying the first major surface and electrically coupled to the first portion and the second portion of contact structure and electrically coupled to the first doped region.