Variable size fin structures

A method for forming a semiconductor structure, comprising:

• forming first fin structures and second fin structures over a substrate;
• forming an insulating layer over top surfaces of the first fin structures and top surfaces of the second fin structures, wherein a first thickness between a top surface of the insulating layer and the top surfaces of the first fin structures is greater than a second thickness between the top surface of the insulating layer and the top surfaces of the second fin structures;
• and
• removing the insulating layer to expose the top surfaces of the first and second fin structures, wherein removing the insulating layer comprises thinning the first fin structures to a first width and thinning the second fin structures to a second width less than the first width.

A method, comprising:

• forming first fin structures and second fin structures over a substrate;
• depositing an insulating layer over top surfaces of the first fin structures and top surfaces of the second fin structures, wherein a first thickness between a top surface of the insulating layer and the top surfaces of the first fin structures is greater than a second thickness between the top surface of the insulating layer and the top surfaces of the second fin structures;
• annealing the insulating layer to form a first interfacial layer over the first fin structures and a second interfacial layer over the second fin structures, wherein a first thickness of the first interfacial layer is less than a second thickness of the second interfacial layer;
• and
• removing the insulating layer and the first and second interfacial layers to thin the first fin structures to a first width and to thin the second fin structures to a second width less than the first width.