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US 11,380,774 B2Granted
Etching back and selective deposition of metal gate
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPeng-Soon Lim, Cheng-Lung Hung, Mao-Lin Huang, Weng Chang
Life of this patent
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Abstract
A method includes forming a dummy gate stack, forming a dielectric layer, with the dummy gate stack located in the dielectric layer, removing the dummy gate stack to form a opening in the dielectric layer, forming a metal layer extending into the opening, and etching back the metal layer. The remaining portions of the metal layer in the opening have edges lower than a top surface of the dielectric layer. A conductive layer is selectively deposited in the opening. The conductive layer is over the metal layer, and the metal layer and the conductive layer in combination form a replacement gate.
Claims20
A method comprising:
- forming a metal layer comprising:
- a first portion extending into a first opening in a dielectric layer;
- and
- a second portion extending into a second opening in the dielectric layer;
- forming a protection layer, wherein an entirety of the protection layer is outside of the first opening, and the protection layer comprises a lower portion extending into the second opening;
- etching back the protection layer until a first top surface of the lower portion is lower than a second top surface of the dielectric layer;
- etching portions of the metal layer in the first opening and the second opening simultaneously, wherein the protection layer is used as an etching mask;
- selectively depositing a first conductive layer in the first opening;
- and
- selectively depositing a second conductive layer in the second opening, wherein the first conductive layer and the second conductive layer are over the first portion and the second portion, respectively, of the metal layer.
7 more elements
A method comprising:
- forming an inter-layer dielectric;
- forming a first opening and a second opening in the inter-layer dielectric;
- forming a gate dielectric layer extending into both of the first opening and the second opening;
- depositing a metal-containing layer, wherein the metal-containing layer comprises a first portion fully filling the first opening, and a second portion partially filling the second opening;
- filling a remaining portion of the second opening with a protection layer;
- performing an etching process, with the protection layer being used as an etching mask to etch-back the second portion of the metal-containing layer, wherein the first portion of the metal-containing layer is simultaneously etched-back during the etching process;
- removing the protection layer;
- and
- selectively depositing a first conductive layer and a second conductive layer into the first opening and the second opening and on the first portion and the second portion, respectively, of the metal-containing layer, with top surfaces of the first conductive layer and the second conductive layer being lower than top surfaces of the inter-layer dielectric.
6 more elements
A method comprising:
- depositing a first high-k dielectric layer and a second high-k dielectric layer extending into a first opening and a second opening in an inter-layer dielectric;
- depositing a metal layer comprising:
- a first portion fully filling the first opening;
- and
- a second portion partially filling the second opening;
- forming a protection layer over the metal layer, wherein the protection layer has a portion filled into the second opening;
- etching back the protection layer to remove all of the protection layer overlapping the first opening, wherein a remaining portion of the protection layer is in the second opening;
- etching the metal layer, the first high-k dielectric layer, and the second high-k dielectric layer, with the remaining portion of the protection layer being used as an etching mask, wherein the etching is performed until first top ends of the first high-k dielectric layer is lower than a first top surface of the inter-layer dielectric, and higher than second top ends of the first portion of the metal layer, and wherein the second top ends of the first portion of the metal layer joins a sidewall of the first high-k dielectric layer;
- selectively depositing a first conductive layer in the first opening;
- and
- selectively depositing a second conductive layer in the second opening, wherein the first conductive layer and the second conductive layer are over the first portion and the second portion, respectively, of the metal layer;
- and
- forming a first gate contact plug and a second gate contact plug electrically coupling to the first portion and the second portion, respectively, of the metal layer.
10 more elements
Dependencies are inferred from the claim text.