Transistor structure
AssigneeSTMicroelectronics S.r.l.
InventorsSotirios Athanasiou, Philippe Galy
Life of this patent
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Abstract
A transistor includes a quasi-intrinsic region of a first conductivity type that is covered with an insulated gate. The quasi-intrinsic region extends between two first doped regions of a second conductivity type. A main electrode is provided on each of the two first doped regions. A second doped region of a second conductivity type is position in contact with the quasi-intrinsic region, but is electrically and physically separated by a distance from the two first doped regions. A control electrode is provided on the second doped region.
Claims15
A transistor, comprising:
- a strip of semiconductor material having first and second opposed sides and first and second opposed ends, wherein a length of each opposed side is greater than a length of each opposed end, said strip of semiconductor material forming a quasi-intrinsic region of a first conductivity type;
- wherein the strip of semiconductor material includes a first portion and a second portion;
- an insulated gate for the transistor covering the first and second portions of the strip of semiconductor material;
- a first doped region of a second conductivity type in contact with the first opposed side of the strip of semiconductor material at the first portion;
- a second doped region of the second conductivity type in contact with the second opposed side of the strip of semiconductor material at the first portion;
- and
- a third doped region of the second conductivity type in contact with the strip of semiconductor material at the second portion;
- wherein the third doped region is physically separated each of the first and second doped regions.
A transistor, comprising:
- a strip of semiconductor material forming a quasi-intrinsic region of a first conductivity type, wherein the strip of semiconductor material includes:
- a handle;
- two branches;
- and
- a portion of connection between the handle and the two branches;
- an insulated gate for the transistor covering the strip of semiconductor material;
- a first doped region of a second conductivity type in contact with a first side of the handle of the strip of semiconductor material;
- a second doped region of the second conductivity type in contact with a second side of the handle of the strip of semiconductor material;
- and
- a third doped region of the second conductivity type positioned in contact with and between the two branches of the strip of semiconductor material;
- wherein the third doped region is physically separated each of the first and second doped regions.
A transistor, comprising:
- a substrate;
- an insulating layer on top of the substrate;
- a semiconductor layer on top of the insulating layer, wherein the semiconductor layer includes:
- a quasi-intrinsic region of a first conductivity type, wherein the quasi-intrinsic region includes a first portion and a second portion;
- an emitter region doped with a second conductivity type in contact with the first portion;
- a collector region doped with the second conductivity type in contact with the first portion;
- and
- a control region doped with the second conductivity type in contact with the second portion;
- wherein the first, second and third doped regions are physically separated from each other;
- and
- an insulated gate covering the first, second and third portions of the quasi-intrinsic region.
Dependencies are inferred from the claim text.