Wide channel gate structure

A gate structure comprising:

• a first isolation structure having a bottom surface;
• and
• a gate comprising:
• a first sidewall adjacent to the first isolation structure;
• a second sidewall angled at a non-perpendicular angle to the first sidewall;
• a first horizontal surface adjacent to a bottom edge of the first sidewall and a bottom edge of the second sidewall, the first horizontal surface being parallel to the bottom surface of the first isolation structure;
• and
• a second horizontal surface adjacent to a top edge of the second sidewall,
• wherein an effective channel width defined by the gate structure includes a height of the second sidewall and a width of the second horizontal surface.

A semiconductor device comprising:

• a plurality of isolation structures, wherein each isolation structure of the plurality of isolation structures is spaced from an adjacent isolation structure of the plurality of isolation structures;
• and
• a gate in each of the plurality of isolation structures, wherein the gate comprises:
• a top surface;
• a first sidewall angled at a non-perpendicular angle with respect to the top surface;
• a second sidewall angled with respect to the top surface;
• and
• a first horizontal surface extending between the first sidewall and the second sidewall, wherein the first horizontal surface is parallel to the top surface, and an effective channel width defined by the gate structure includes a length of the first sidewall, a length of the second sidewall and a length of the first horizontal surface.