CMOS over array of 3-D DRAM device
AssigneeApplied Materials, Inc.
InventorsSony Varghese, Fred Fishburn
Life of this patent
Estimating the term…
Abstract
Disclosed are 3-D DRAM devices and methods of forming 3-D DRAM devices. One method may include forming a stack of DRAM device layers, forming a MOS substrate directly atop the stack of alternating DRAM device layers, and forming a trench through the MOS substrate and the stack of DRAM device layers. The method may further include depositing a protection layer over the MOS substrate, wherein the protection layer is deposited at a non-zero angle of inclination relative to a vertical extending from a top surface of the MOS substrate.
Claims20
A method, comprising:
- forming a stack of dynamic random access memory (DRAM) device layers;
- forming a metal-oxide-semiconductor (MOS) substrate directly atop the stack of DRAM device layers;
- forming a trench through the MOS substrate and the stack of DRAM device layers;
- and
- depositing a protection layer over the MOS substrate, wherein the protection layer is deposited at a non-zero angle of inclination relative to a vertical extending from a top surface of the MOS substrate, and wherein the protection layer is formed along a sidewall of the MOS substrate without being formed along the stack of DRAM device layers within the trench.
A method of forming a dynamic random-access memory (DRAM) device, the method comprising:
- forming a stack of DRAM device layers;
- forming a complementary metal-oxide-semiconductor (CMOS) substrate directly atop the stack of DRAM device layers;
- forming a trench through the CMOS substrate and the stack of DRAM device layers;
- and
- depositing a protection layer over an upper surface and a sidewall of the CMOS substrate, wherein the protection layer is deposited at a non-zero angle of inclination relative to a vertical extending from a top surface of the CMOS substrate, and wherein the protection layer is prevented from being formed along the stack of DRAM device layers within the trench.
A method of forming a dynamic random-access memory (DRAM) device, the method comprising:
- epitaxially forming a stack of alternating silicon and silicon germanium layers;
- forming a complementary metal-oxide-semiconductor (CMOS) substrate directly atop the stack of alternating silicon and silicon germanium layers;
- forming a trench through the CMOS substrate and through the stack of alternating silicon and silicon germanium layers;
- and
- depositing a protection layer over an upper surface and a sidewall of the CMOS substrate, wherein the protection layer is deposited at a non-zero angle of inclination relative to a vertical extending from a top surface of the CMOS substrate, and wherein the protection layer is prevented from being formed along the stack of alternating silicon and silicon germanium layers within the trench.
Dependencies are inferred from the claim text.