Multi-level distributed clamps

A system comprising:

• a printed circuit board;
• one or more memory components coupled with the printed circuit board;
• and
• an integrated circuit device package coupled with the printed circuit board, wherein the integrated circuit device package comprises:
• a package substrate coupled with a die stack, wherein the die stack comprises:
• a first die;
• and
• a second die coupled with the first die, wherein the second die comprises:
• a first set of one or more contacts on a first surface, the first set of one or more contacts coupled with contacts of the first die;
• two or more groupings of multi-level voltage clamps coupled with the first set of one or more contacts, the two or more groupings of multi-level voltage clamps present in separate areas of the second die at different densities;
• one or more integrated voltage regulators coupled with the two or more groupings of multi-level voltage clamps, the one or more integrated voltage regulators to provide an output voltage;
• one or more through silicon vias (TSVs) coupled with the one or more integrated voltage regulators;
• and
• a second set of one or more contacts on a second surface, opposite the first surface, the second set of one or more contacts coupled with the one or more TSVs, and the second set of one or more contacts coupled with contacts of the package substrate.