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US 11,380,618 B2Granted
Power distribution circuitry
AssigneeArm Limited
InventorsMarlin Wayne Frederick, Jr., Karen Lee Delk
Life of this patent
Estimating the term…
Abstract
Various implementations described herein are directed to an integrated circuit having a power gate cell and a first power distribution grid. The integrated circuit may include a second power distribution grid aligned with and disposed above the power gate cell. The second power distribution grid may be disposed between the power gate cell and the first power distribution grid.
Claims22
An integrated circuit, comprising:
- a power gate cell comprising cell portions with one or more power switches, at least one metal layer and one or more power gate pin layers, wherein the at least one metal layer is disposed between the one or more cell portions, wherein the power gate cell is disposed in a first layer of a multi-layered structure having the first layer, a second layer and a third layer, wherein the one or more power gate pin layers have one or more power gate pins used to electrically couple the power gate cell to at least one of the second layer and the third layer;
- a first power distribution grid disposed in the third layer above the first layer;
- and
- a second power distribution grid aligned with and disposed in the second layer above the power gate cell in the first layer, wherein the second power distribution grid is disposed in the second layer between the power gate cell in the first layer and the first power distribution grid in the third layer, wherein the one or more power gate pins of the one or more power gate pin layers disposed in the first layer are used to electrically couple the power gate cell in the first layer to at least one of the second power distribution grid in the second layer and the first power distribution grid in the third layer.
1 more element
An integrated circuit, comprising:
- a power gate cell comprising cell portions with one or more power switches, at least one metal layer and one or more power gate pin layers, wherein the at least one metal layer is disposed between the one or more cell portions, wherein the power gate cell is disposed in a first layer of a multi-layered structure having the first layer, a second layer and a third layer, wherein the one or more power gate pin layers have one or more power gate pins used to electrically couple the power gate cell to at least one of the second layer and the third layer;
- a global power distribution grid electrically coupled to the power gate cell via the one or more power gate pins of the one or more power gate pin layers in the first layer, wherein the global power distribution grid is disposed in the third layer;
- and
- a local power distribution grid electrically coupled to the power gate cell via the one or more power gate pins of the one or more power gate pin layers in the first layer, wherein the local power distribution grid is aligned with and disposed above the power gate cell, and wherein the local power distribution grid is disposed in the second layer between the power gate cell in the first layer and the global power distribution grid in the third layer.
1 more element
A method of manufacturing an integrated circuit, comprising:
- fabricating a power gate cell, wherein the power gate cell comprises cell portions with one or more power switches, at least one metal layer and one or more power gate pin layers, wherein the at least one metal layer is disposed between the one or more cell portions, wherein the power gate cell is disposed in a first layer of a multi-layered structure having the first layer, a second layer and a third layer, wherein the one or more power gate pin layers have one or more power gate pins used to electrically couple the power gate cell to at least one of the second layer and the third layer;
- fabricating a global power distribution grid in the third layer;
- and
- fabricating a local power distribution grid aligned with and disposed in the second layer above the power gate cell in the first layer, wherein the local power distribution grid is disposed in the second layer between the power gate cell in the first layer and the global power distribution grid in the third layer, wherein the one or more power gate pins of the one or more power gate pin layers disposed in the first layer are used to electrically couple the power gate cell in the first layer to at least one of the local power distribution grid in the second layer and the global power distribution grid in the third layer.
1 more element
Dependencies are inferred from the claim text.