Fan out package-on-package with adhesive die attach

A packaged microelectronic device, comprising:

• a microprocessor chip, wherein a first side of the microprocessor chip is electrically coupled to one or more redistribution layers of a package;
• a via structure adjacent to the microprocessor chip, wherein a first side of the via structure is electrically coupled to the one or more redistribution layers;
• a first package material between a sidewall of the microprocessor chip and a sidewall of the via structure;
• a memory chip over a second side of the microprocessor chip, over a second side of the via structure, and electrically coupled to the second side of the via structure through a plurality of interconnects comprising solder features;
• and
• a second package material between the microprocessor chip and the memory chip, wherein the second package material is in contact with the second chip, and an edge of the second package material proximal to the interconnects is laterally spaced apart from a sidewall of at least one of the solder features.

A method of fabricating a microelectronic package assembly, the method comprising:

• receiving a workpiece, the workpiece comprising a first chip and a via structure embedded within a first package material, wherein a first side of the first chip and a first side of the via structure are electrically coupled to one or more redistribution layers of a package;
• applying a second package material above a second side of at least a portion of the first chip;
• adhering a second chip to the assembly through contact with the second package material;
• electrically coupling the second chip to a second side of the via structure by reflowing-a plurality of interconnects comprising solder features;
• and
• underfilling a third package material between the plurality of solder interconnects electrically coupled to the second chip.