US 11,380,607 B2Granted

Semiconductor device

AssigneeSamsung Electronics Co., Ltd.

InventorsJinnam Kim, Seokho Kim, Hoonjoo Na, Kwangjin Moon

Life of this patent

Estimating the term…

Loading patent…

Abstract

A semiconductor device includes a substrate having a first surface on which an active region is disposed, and a second surface opposite the first surface, a buried conductive line extending in one direction and having a portion buried in the active region, an insulating portion covering the buried conductive line, a contact structure disposed on the insulating portion and connected to the buried conductive line, a through-hole extending from the second surface to the insulating portion and exposing the buried portion of the buried conductive line, an insulating isolation film disposed on a side surface of the buried conductive line and exposing a bottom surface of the buried portion and a side surface adjacent to the bottom surface, a through-via contacting the bottom surface and the adjacent side surface of the buried conductive line, an insulating liner surrounding the through-via.

Claims20

Dependent claims

A semiconductor device comprising:

a substrate having a first surface and a second surface opposite each other, and being provided with an active region at the first surface, wherein the active region has a plurality of active fins extending in a first direction;
a first isolation region defining the active region, wherein a bottom surface of the first isolation region is lower than the topmost surface of the first surface of the substrate;
a second isolation region defining the plurality of active fins, wherein a bottom surface of the second isolation region is higher than the bottom surface of the first isolation region;
a buried conductive line buried in the second isolation region, and extending in the first direction;
an insulating isolation film including a first portion which is disposed between the second isolation region and the buried conductive line;
an interlayer insulating layer disposed on the first isolation region and the second isolation region, and covering the buried conductive line;
a contact structure penetrating through the interlayer insulating layer and connected to the buried conductive line;
a through-hole extending toward the first surface of the substrate from the second surface of the substrate, and exposing a portion of the buried conductive line, wherein the exposed portion of the buried conductive line extends beyond the bottom surface of the second isolation region toward the second surface of the substrate;
a through-via disposed in the through-hole and contacting a bottom surface of the exposed portion of the buried conductive line and a side surface of the exposed portion of the buried conductive line, wherein the side surface of the exposed portion of the buried conductive line is adjacent to the bottom surface of the exposed portion of the buried conductive line;
and
an insulating liner disposed between an inner sidewall of the through-hole and the through-via.

8 more elements

A semiconductor device comprising:

a substrate having a first surface and a second surface opposite the first surface, and being provided with an active region at the first surface;
a buried conductive line disposed in the active region and extending in a first direction, wherein the buried conductive line has a first portion and a second portion, and the second portion of the buried conductive line is surrounded by the active region;
an insulating layer disposed on the first surface of the substrate and covering the buried conductive line, wherein the first portion of the buried conductive line is buried in the insulating layer;
a contact structure disposed on the insulating layer and connected to the buried conductive line;
a through-hole extending from the second surface of the substrate to the insulating layer and exposing the second portion of the buried conductive line;
an insulating isolation film disposed on a side surface of the buried conductive line and surrounding the buried conductive line, the insulating isolation film exposing a bottom surface of the second portion of the buried conductive line and a side surface of the second portion of the buried conductive line, wherein the side surface of the second portion of the buried conductive line is adjacent to the bottom surface of the second portion of the buried conductive line;
a through-via disposed in the through-hole and contacting the bottom surface of the second portion of the buried conductive line and the side surface of the second portion of the buried conductive line;
an insulating liner disposed between an inner side wall of the through-hole and the through-via;
and
a backside wiring disposed on the second surface of the substrate and connected to the through-via.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/147,927Filed 13 Jan 2021
Priority: KR 10-2020-006511029 May 2020
Published: US 2021/0375722 A12 Dec 2021
Granted: 5 Jul 2022
Term ends: Not estimatedThe source records don’t support an estimate.

Classification18 codes

H10W 20/023
Of interconnections within wafers or substrates: the interconnections being through-semiconductor vias
H10W 20/20
Interconnections in chips, wafers or substrates: interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
H10D 30/024
Of FETs having insulated gates [IGFET]: of fin field-effect transistors [FinFET]
H10D 30/62
Insulated-gate field-effect transistors [IGFET]: fin field-effect transistors [FinFET]