Back to results
US 11,380,600 B2Granted
Semiconductor apparatus
AssigneeTeknologian tutkimuskeskus VTT Oy
InventorsHeikki Viljanen, Pekka Rantakari, Tauno Vähä-Heikkilä, Esa Tuovinen
Life of this patent
Estimating the term…
Abstract
A semiconductor apparatus having a silicon substrate layer at least portion of which is doped with dopants of a conductivity type; and at least one insulator layer formed above the silicon substrate layer, wherein the at least one insulator layer and the dopants of the silicon substrate layer have opposite electric charges.
Claims13
A semiconductor apparatus comprising:
- a surface passivated silicon substrate layer at least a portion of which is doped with dopants of a conductivity type;
- a first insulator layer formed above the silicon substrate layer;
- wherein the first insulator layer and the dopants of the silicon substrate layer have opposite electric charges, wherein a static charge of the first insulator layer causes forming of a depletion region at an interface between the at least one insulator layer and the silicon substrate layer, and wherein the first insulator layer has thickness that is determined based on the static charge of the first insulator layer and properties of the silicon substrate layer;
- a first metal layer, wherein the first insulator layer is arranged between the silicon substrate layer and the first metal layer;
- and
- a second insulator layer and a second metal layer, wherein the second insulator layer is arranged between the first metal layer and the second metal layer, and the second metal layer is arranged above the first metal layer,
- wherein at least one of the first insulator layer and the second insulator layer comprises an Atomic Layer Deposition (ALD) grown aluminum oxide layer, an Atomic Layer Deposition (ALD) grown aluminum nitride layer, or a plasma enhanced chemical vapor deposition (PECVD) oxide or nitride layer.
4 more elements
A method for manufacturing a semiconductor apparatus, comprising:
- providing a surface passivated silicon substrate comprising dopants of a first conductivity type;
- depositing a first insulator layer on the silicon substrate, wherein a static charge of the first insulator layer is of a second conductivity type, opposite to the first conductivity type, wherein the static charge of the first insulator layer causes forming of a depletion region at an interface between the at least one insulator layer and the silicon substrate layer, and wherein the first insulator layer has thickness that is determined based on the static charge of the first insulator layer and properties of the silicon substrate layer;
- forming a first metal layer above the first insulator layer;
- and
- forming a second insulator layer and a second metal layer, wherein the second insulator layer is arranged between the first metal layer and the second metal layer, and the second metal layer is arranged above the first metal layer,
- wherein at least one of the first insulator layer and the second insulator layer comprises an Atomic Layer Deposition (ALD) grown aluminum oxide layer, an Atomic Layer Deposition (ALD) grown aluminum nitride layer, or a plasma enhanced chemical vapor deposition (PECVD) oxide or nitride layer.
3 more elements
A semiconductor apparatus comprising:
- a surface passivated silicon substrate layer at least a portion of which is doped with dopants of a conductivity type;
- a first insulator layer formed above the surface passivated silicon substrate layer;
- wherein the first insulator layer and the dopants of the surface passivated silicon substrate layer have opposite electric charges, wherein a static charge of the first insulator layer causes forming of a depletion region at an interface between the at least one insulator layer and the surface passivated silicon substrate layer, and wherein the first insulator layer has thickness that is determined based on the static charge of the first insulator layer and properties of the surface passivated silicon substrate layer;
- a first metal layer, wherein the first insulator layer is arranged between the surface passivated silicon substrate layer and the first metal layer;
- and
- a second insulator layer and a second metal layer, wherein the second insulator layer is arranged between the first metal layer and the second metal layer, and the second metal layer is arranged above the first metal layer,
- wherein the first insulator layer comprises an Atomic Layer Deposition (ALD) aluminum oxide layer in contact with the surface passivated silicon substrate, and a plasma enhanced chemical vapor deposition (PECVD) layer on top of the ALD aluminum oxide layer.
4 more elements
Dependencies are inferred from the claim text.