Semiconductor fin cutting process and structures formed thereby
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShih-Wen Huang, Jaming Chang, Kai Hung Cheng, Chia-Hui Lin, Jei Ming Chen
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Abstract
Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.
Claims20
A method of forming a semiconductor device, the method comprising:
- forming a fin on a substrate;
- forming isolation regions on the substrate, where the fin protrudes above the isolation regions;
- forming a gate structure over the fin;
- forming first spacer and a second spacer adjacent the gate structure, wherein the gate structure is interposed between the first spacer and the second spacer;
- removing a first portion of the gate structure and a first portion of the fin to form a first recess, wherein the first recess extends lower than an upper surface of the isolation regions;
- forming a liner layer in the first recess;
- and
- after forming the liner layer, forming a fill material on the liner layer in the first recess, wherein the fill material is an insulating material.
A method of forming a semiconductor device, the method comprising:
- forming a first fin on a substrate;
- forming a first isolation region and a second isolation region, the first fin being interposed between the first isolation region and the second isolation region, wherein the first fin extends above an upper surface of the first isolation region and the second isolation region, wherein the first isolation region and the second isolation region are dielectric;
- forming a dummy gate structure over the first fin;
- forming a first spacer and a second spacer adjacent the first fin, the dummy gate structure being interposed between the first spacer and the second spacer;
- forming one or more dielectric layers adjacent the first spacer and the second spacer;
- removing a first portion of the dummy gate structure to form a first recess;
- forming a gate cut structure in the first recess;
- removing a second portion of the dummy gate structure and a portion of the first fin to form a second recess;
- forming a fin cut-fill structure in the second recess, forming the fin cut-fill structure comprising:
- forming an insulating liner in the second recess, the insulating liner comprising a material with a band gap greater than 5 eV;
- and
- forming a fill material on the insulating liner, wherein a bottom surface of the insulating liner is lower than an upper surface of the first isolation region and an upper surface of a second isolation region, wherein an upper surface of the insulating liner is higher than the upper surface of the first isolation region and the upper surface of a second isolation region;
- and
- replacing a third portion of the dummy gate structure to form a gate structure disposed between the first spacer and the second spacer.
A structure comprising:
- a first fin and a second fin on a substrate, the first fin and the second fin having a same first longitudinal axis;
- isolation regions along opposing sides of the first fin and the second fin, wherein the first fin and the second fin protrudes above an upper surface of the isolation regions;
- a first gate structure and a second gate structure, the first gate structure and the structure having a same second longitudinal axis;
- a gate cut structure interposed between the first gate structure and the second gate structure, the gate cut structure having a third longitudinal axis parallel to the first longitudinal axis, wherein the gate cut structure directly contacts the second gate structure;
- and
- a fin cut structure interposed between the first gate structure and the second gate structure, the fin cut structure having a fourth longitudinal axis parallel to the second longitudinal axis, wherein the fin cut structure comprises:
- an insulating liner comprising a material with a band gap greater than 5 eV;
- and
- a fill material on the insulating liner, wherein a bottom surface of the insulating liner is lower than an upper surface of the isolation regions, wherein an upper surface of the insulating liner is higher than the upper surface of the isolation regions.
Dependencies are inferred from the claim text.