Etch stop layer for memory device formation

A method of forming an integrated chip, comprising:

• forming a memory device over one or more lower inter-level dielectric (ILD) layers on a substrate, wherein the memory device comprises a data storage structure disposed between a bottom electrode and a top electrode;
• forming an etch stop layer over the top electrode, wherein the etch stop layer comprises a metal oxide or a metal nitride;
• forming an upper ILD layer over the etch stop layer and laterally surrounding the memory device;
• forming a recess within the upper ILD layer, wherein the recess extends from a top of the upper ILD layer to the etch stop layer;
• removing an exposed part of the etch stop layer;
• and
• forming an upper interconnect wire within the recess.

An integrated chip, comprising:

• a memory device disposed over a lower interconnect within one or more lower inter-level dielectric (ILD) layers over a substrate;
• one or more sidewall spacers arranged along opposing sides of the memory device;
• an upper ILD layer laterally surrounding the memory device;
• an etch stop layer disposed on a sidewall of the one or more sidewall spacers and over an upper surface of the one or more lower ILD layers, wherein the etch stop layer has a topmost surface that is vertically below both a top of the memory device and a topmost surface of the one or more sidewall spacers;
• and
• an upper interconnect wire contacting sidewalls of the memory device above the etch stop layer.