Selective overdrive of supply voltage to primary switch for programming memory cells

A memory device comprising:

• a memory array comprising memory cells;
• a linear regulator operatively coupled with the memory array, the linear regulator comprising a primary switch to generate a regulated voltage usable to program the memory cells;
• a first digital-to-analog converter (DAC) having an output coupled with the linear regulator;
• a comparator having an output that is coupled to a charge pump, the charge pump to provide a supply voltage to the linear regulator;
• a second DAC having an output coupled with the comparator;
• and
• control logic, operatively coupled with the first DAC and the second DAC, the control logic to perform operations comprising:
• causing a first digital input value to be provided to the first DAC to selectively smooth noise on the supply voltage;
• and
• causing a second digital input value to be provided to the second DAC to selectively adjust the supply voltage based on a programmable offset value.

A memory device comprising:

• a memory array comprising memory cells;
• a linear regulator operatively coupled with the memory array, the linear regulator comprising:
• a transistor to generate a regulated voltage to program the memory array;
• and
• an operational amplifier to drive a gate of the transistor, the operational amplifier to receive, as inputs, a feedback voltage from a source of the transistor and a reference voltage;
• a first digital-to-analog converter (DAC) having an output coupled with the linear regulator and to supply the reference voltage;
• a charge pump to provide a supply voltage to the linear regulator;
• and
• control logic, operatively coupled with the first DAC, the control logic to perform operations comprising causing a first digital input value to be provided to the first DAC to selectively smooth noise on the supply voltage.