Multiplexor for a semiconductor device
AssigneeMicron Technology, Inc.
InventorsYuan He, Tae H. Kim
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AssigneeMicron Technology, Inc.
InventorsYuan He, Tae H. Kim
Estimating the term…
A memory device can comprise an arrays of memory cells comprising a plurality of vertically stacked tiers of memory cells, a respective plurality of horizontal access lines coupled to each of the plurality of tiers of memory cells, and a plurality of vertical sense lines coupled to each of the plurality of tiers of memory cells. The array of memory cells can further comprise a plurality of multiplexors each coupled to a respective vertical sense line, wherein each of the plurality of multiplexors includes a first portion and a second portion, the first portion is coupled to the array of memory cells and the second portion is formed on a substrate material. The array of memory cells can further comprise a semiconductor under the array (SuA) circuitry comprising a plurality of sense amplifiers, each sense amplifier coupled to a respective subset of the plurality of multiplexors.
A memory device, comprising:
A method of operating a memory device, comprising:
A method of sensing a memory cell in an array of memory cells, comprising:
Dependencies are inferred from the claim text.